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參數(shù)資料
| 型號： | HD404449H |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | MROM, MICROCONTROLLER, PQFP80 |
| 封裝： | PLASTIC, QFP-80 |
| 文件頁數(shù)： | 17/33頁 |
| 文件大?。?/td> | 440K |
| 代理商： | HD404449H |
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HD404449 Series
22
Interrupt Enable Flag (IE: $000, Bit 0): Controls the entire interrupt process. It is reset by the interrupt
processing and set by the RTNI instruction, as listed in table 4.
Table 4
Interrupt Enable Flag (IE: $000, Bit 0)
IE
Interrupt Enabled/Disabled
0
Disabled
1
Enabled
External Interrupts (
INT
0, INT1, INT2, INT3): Four external interrupt signals.
External Interrupt Request Flags (IF0, IF1, IF2, IF3: $000, $001, $022): IF0 and IF1 are set at the
falling edge of signals input to
INT
0 and INT1, and IF2 and IF3 are set at the rising or falling edge of signals
input to INT
2 and INT3, as listed in table 5. The INT2 and INT 3 interrupt edges are selected by the detection
edge select registers (ESR1, ESR2: $026, $027) as shown in figures 12 and 13.
Table 5
External Interrupt Request Flags (IF0–IF3: $000, $001, $022)
IF0–IF3
Interrupt Request
0No
1
Yes
Bit
Initial value
Read/Write
Bit name
3
0
W
ESR13
2
0
W
ESR12
0
W
ESR10
1
0
W
ESR11
Detection edge selection register 1 (ESR1: $026)
ESR11
0
1
ESR10
0
1
0
1
INT2 detection edge
No detection
Falling-edge detection
Rising-edge detection
Double-edge detection*
ESR13
0
1
ESR12
0
1
0
1
INT3 detection edge
No detection
Falling-edge detection
Rising-edge detection
Double-edge detection*
Note: *Both falling and rising edges are detected.
Figure 12 Detection Edge Selection Register 1 (ESR1)
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相關(guān)代理商/技術(shù)參數(shù) |
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|---|---|
| HD404449SERIES | 制造商:未知廠家 制造商全稱:未知廠家 功能描述: |
| HD404449TF | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:4-Bit Microcontroller |
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| HD404458H | 制造商:RENESAS 制造商全稱:Renesas Technology Corp 功能描述:4-bit HMCS400-series microcomputers |
| HD404459 | 制造商:RENESAS 制造商全稱:Renesas Technology Corp 功能描述:4-bit HMCS400-series microcomputers |
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