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參數(shù)資料
| 型號(hào)： | HD1L3N |
| 廠商： | NEC Corp. |
| 英文描述： | on-chip resistor NPN silicon epitaxial transistor For mid-speed switching |
| 中文描述： | 片上NPN硅外延電阻晶體管中速開(kāi)關(guān) |
| 文件頁(yè)數(shù)： | 1/6頁(yè) |
| 文件大?。?/td> | 112K |
| 代理商： | HD1L3N |
2002
Document No. D16182EJ2V0DS00 (2nd edition)
Date Published April 2002 N CP(K)
Printed in Japan
COMPOUND TRANSISTOR
HD1 SERIES
on-chip resistor NPN silicon epitaxial transistor
For mid-speed switching
DATA SHEET
The information in this document is subject to change without notice. Before using this document, please
confirm that this is the latest version.
Not all devices/types available in every country. Please check with local NEC representative for
availability and additional information.
FEATURES
High current drives such as IC outputs and actuators available
On-chip bias resistor
Low power consumption during drive
HD1 SERIES LISTS
Products
Marking
R
1
(K
)
R
2
(K
)
HD1A3M
LP
1.0
1.0
HD1F3P
LQ
2.2
10
HD1L3N
LR
4.7
10
HD1A4M
LS
10
10
HD1L2Q
LT
0.47
4.7
HD1F2Q
LU
0.22
2.2
HD1A4A
LX
10
PACKAGE DRAWING (UNIT: mm)
ABSOLUTE MAXIMUM RATINGS (Ta = 25
°
C)
Parameter
Symbol
Ratings
Unit
Collector to base voltage
V
CBO
80
V
Collector to emitter voltage
V
CEO
60
V
Emitter to base voltage
V
EBO
10
V
Collector current (DC)
I
C(DC)
1.0
A
Collector current (Pulse)
I
C(pulse)
*
2.0
A
Base current (DC)
I
B(DC)
0.02
A
Total power dissipation
P
T
**
2.0
W
°
C
°
C
Junction temperature
T
j
150
Storage temperature
T
stg
55 to +150
* PW
≤
10 ms, duty cycle
≤
50 %
**When 0.7 mm
×
16 cm
2
ceramic board is used
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