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參數(shù)資料
| 型號： | HD1-6408-9 |
| 廠商： | HARRIS SEMICONDUCTOR |
| 元件分類： | 網(wǎng)絡(luò)接口 |
| 英文描述： | Bridge Rectifier; Package/Case:TO-220; Current Rating:8A; Mounting Type:Through Hole |
| 中文描述： | DATACOM, MANCHESTER ENCODER/DECODER, PDIP24 |
| 文件頁數(shù)： | 4/11頁 |
| 文件大小： | 57K |
| 代理商： | HD1-6408-9 |
5-4
Encoder Operation
The Encoder requires a single clock with a frequency of
twice the desired data rate applied at the SClock input. An
auxiliary divide by six counter is provided on chip which can
be utilized to produce the SClock by dividing the DClock.
The Encoder’s cycle begins when EE is high during a falling
edge of ESC (1). This cycle lasts for one word length or
twenty ESC periods. At the next low-to-high transition of the
ESC, a high at SS input actuates a Command sync or a low
will produce a Data sync for that word (2). When the Encoder
is ready to accept data, the SD output will go high and
remain high for sixteen ESC periods (3) - (4).
During these sixteen periods the data should be clocked into
the SD Input with every high-to-low transition of the ESC (3)
- (4). After the sync and Manchester II encoded data are
transmitted through the BOO and BZO outputs, the Encoder
adds on an additional bit which is the (odd) parity for that
word (5). If ENCODER ENABLE is held high continuously,
consecutive words will be encoded without an interframe
gap. ENCODER ENABLE must go low by time (5) as shown
to prevent a consecutive word from being encoded. At any
time a low on OI will force both bipolar outputs to a high state
but will not affect the Encoder in any other way.
To Abort the Encoder transmission a positive pulse must be
applied at MR. Any time after or during this pulse, a low-to-
high transition on SCI clears the internal counters and initial-
izes the Encoder for a new word.
1ST HALF
0
1
2
3
4
5
6
7
15
16
17
TIMING
19
18
3
2
1
0
10
11
12
13
14
15
3
2
1
0
11
12
13
14
15
P
2ND HALF
3
2
1
0
11
12
13
14
15
P
SYNC
SYNC
4
5
2
3
1
SCI
ESC
EE
SS
SD
SDI
BOO
BZO
DON’T CARE
DON’T CARE
VALID
HD-6408
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| HD3-6408-9 | CMOS Asynchronous Serial Manchester Adapter (ASMA) |
| HD-6408 | CMOS Asynchronous Serial Manchester Adapter (ASMA) |
| HD14066BG | SPST Analog Switch |
| HD14066BP | SPST Analog Switch |
| HD146818AFP | Real-Time Clock |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| HD1-6408-9R2490 | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| HD1-6409/883 | 制造商:Intersil Corporation 功能描述:ENCODER/DECODER 20CDIP - Rail/Tube |
| HD1-6409-2 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Encoder/Decoder |
| HD1-6409-9 | 制造商:Harris Corporation 功能描述:ENCODER/DECODER, 20 Pin, Ceramic, DIP |
| HD1-6409C-9 | 制造商:Rochester Electronics LLC 功能描述:- Bulk 制造商:Harris Corporation 功能描述: |
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