參數(shù)資料
型號: HCTS86HMSR
廠商: HARRIS SEMICONDUCTOR
元件分類: 通用總線功能
英文描述: Radiation Hardened Quad 2-Input Exclusive OR Gate
中文描述: HCT SERIES, QUAD 2-INPUT XOR GATE, UUC14
文件頁數(shù): 1/9頁
文件大小: 146K
代理商: HCTS86HMSR
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
http://www.intersil.com or 407-727-9207
|
Copyright
Intersil Corporation 1999
HCTS86MS
Radiation Hardened
Quad 2-Input Exclusive OR Gate
Pinouts
14 LEAD CERAMIC DUAL-IN-LINE
METAL SEAL PACKAGE (SBDIP)
MIL-STD-1835 CDIP2-T14, LEAD FINISH C
TOP VIEW
14 LEAD CERAMIC METAL SEAL FLATPACK PACKAGE
(FLATPACK) MIL-STD-1835 CDFP3-F14, LEAD FINISH C
TOP VIEW
Functional Diagram
TRUTH TABLE
INPUTS
OUTPUTS
An
Bn
Yn
L
L
L
L
H
H
H
L
H
H
H
L
NOTE: L = Logic Level Low, H = Logic level High
A1
B1
Y1
A2
B2
Y2
GND
VCC
B4
A4
Y4
B3
A3
Y3
1
2
3
4
5
6
7
14
13
12
11
10
9
8
14
13
12
11
10
9
8
2
3
4
5
6
7
1
A1
B1
Y1
A2
B2
Y2
GND
VCC
B4
A4
Y4
B3
A3
Y3
An
Bn
Yn
(2, 5, 10, 13)
(1, 4, 9, 12)
(3, 6, 8, 11)
Features
3 Micron Radiation Hardened SOS CMOS
Total Dose 200K RAD (Si)
SEP Effective LET No Upsets: >100 MEV-cm
2
/mg
Single Event Upset (SEU) Immunity < 2 x 10
-9
Errors/Bit-Day
(Typ)
Dose Rate Survivability: >1 x 10
12
RAD (Si)/s
Dose Rate Upset >10
10
RAD (Si)/s 20ns Pulse
Latch-Up Free Under Any Conditions
Military Temperature Range: -55
o
C to +125
o
C
Significant Power Reduction Compared to LSTTL ICs
DC Operating Voltage Range: 4.5V to 5.5V
LSTTL Input Compatibility
- VIL = 0.8V Max
- VIH = VCC/2 Min
Input Current Levels Ii
5
μ
A at VOL, VOH
Description
The Intersil HCTS86MS is a Radiation Hardened Quad 2-Input
Exclusive OR Gate. A high on any one input exclusively will
change the output to a High state.
The HCTS86MS utilizes advanced CMOS/SOS technology to
achieve high-speed operation. This device is a member of radia-
tion hardened, high-speed, CMOS/SOS Logic Family.
The HCTS86MS is supplied in a 14 lead Ceramic flatpack
(K suffix) or a SBDIP Package (D suffix).
Ordering Information
PART
NUMBER
TEMPERATURE
RANGE
SCREENING
LEVEL
PACKAGE
HCTS86DMSR
-55
o
C to +125
o
C
Intersil Class
S Equivalent
14 Lead SBDIP
HCTS86KMSR
-55
o
C to +125
o
C
Intersil Class
S Equivalent
14 Lead Ceramic
Flatpack
HCTS86D/
Sample
+25
o
C
Sample
14 Lead SBDIP
HCTS86K/
Sample
+25
o
C
Sample
14 Lead Ceramic
Flatpack
HCTS86HMSR
+25
o
C
Die
Die
October 1995
Spec Number
518623
File Number
2249.2
相關(guān)PDF資料
PDF描述
HCTS86D Quadruple Bus Buffer Gates With 3-State Outputs 14-CDIP -55 to 125
HCTS86DMSR Quadruple Bus Buffer Gates With 3-State Outputs 14-CFP -55 to 125
HCTS86K Quadruple Bus Buffer Gates With 3-State Outputs 20-LCCC -55 to 125
HCTS86KMSR Quadruple Bus Buffer Gates With 3-State Outputs 14-CDIP -55 to 125
HCTS86MS Quadruple Bus Buffer Gates With 3-State Outputs 14-CFP -55 to 125
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
HCTS86K 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:Radiation Hardened Quad 2-Input Exclusive OR Gate
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HCTS86MS 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:Radiation Hardened Quad 2-Input Exclusive OR Gate
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