9
7. CM
is the maximum tolerable rate of rise of the common mode voltage to assure that the output will remain in a high logic state
(i.e., V
> 2.0 V).
8. CM
L
is the maximum tolerable rate of fall of the common mode voltage to assure that the output will remain in a low logic state (i.e.,
V
< 0.8 V).
9. For sinusoidal voltages,
CM
|
|dv
=
π
f
CM
V
CM
(p-p)
dt
max
10. No external pull up is required for a high logic state on the enable input. If the V
E
pin is not used, tying V
E
to V
CC
will result in
improved CMR performance.
11. In accordance with UL 1577, each optocoupler is proof tested by applying an insulation test voltage of
≥
3000 for one second
(leakage detection current limit, I
≤
5
μ
A).
12. t
is equal to the worst case difference in t
PHL
and/or t
PLH
that will be seen between units at any given temperature within the
operating condition range.
13. See application section titled “Propagation Delay, Pulse-Width Distortion and Propagation Delay Skew” for more information.
Notes:
1. Bypassing of the power supply line is required, with a 0.1
μ
F ceramic disc capacitor adjacent to each optocoupler as illustrated in
Figure 15. Total lead length between both ends of the capacitor and the isolator pins should not exceed 20 mm.
2. Device considered a two terminal device: pins 1, 2, 3, and 4 shorted together, and pins 5, 6, 7, and 8 shorted together.
3. The t
propagation delay is measured from the 3.75 mA point on the falling edge of the input pulse to the 1.5 V point on the rising
edge of the output pulse.
4. The t
propagation delay is measured from the 3.75 mA point on the rising edge of the input pulse to the 1.5 V point on the falling
edge of the output pulse.
5. The t
enable propagation delay is measured from the 1.5 V point on the falling edge of the enable input pulse to the 1.5 V point
on the rising edge of the output pulse.
6. The t
enable propagation delay is measured from the 1.5 V point on the rising edge of the enable input pulse to the 1.5 V point on
the falling edge of the output pulse.
Figure 1. Typical High Level Output
Current vs. Temperature.
Figure 2. Typical Low Level Output
Voltage vs. Temperature.
Figure 3. Typical Input Characteristics.
1.0
0
20
30
40
60
I
I
– INPUT CURRENT – mA
10
50
1.2
1.4
1.6
1.8
2.0
2.2
2.4
2.6
V
I
25°C
70°C
0°C
Figure 5. Typical Low Level Output
Current vs. Temperature.
Figure 4. Typical Output Voltage vs.
Forward Input Current.
1
6
2
3
4
5
1
2
3
4
5
6
I
F
– FORWARD INPUT CURRENT – mA
R
L
= 350
R
L
= 1 K
R
L
= 4 K
00
V
CC
= 5 V
T
A
= 25 °C
V
O
I
O
–
-60
0
T
A
– TEMPERATURE – °C
100
10
15
-20
5
20
V
CC
= 5.5 V
V
O
= 5.5 V
V
= 2 V
I
I
= 250 μA
60
-40
0
40
80
V
CC
= 5.5 V
V
= 2 V
I
I
= 5 mA
0.5
0.4
-60
-20
20
60
100
T
A
– TEMPERATURE – °C
0.3
80
40
0
-40
0.1
V
O
0.2
I
O
= 16 mA
I
O
= 12.8 mA
I
O
= 9.6 mA
I
O
= 6.4 mA
V
CC
= 5 V
V
E
= 2 V
V
OL
= 0.6 V
70
60
-60
-20
20
60
100
T
A
– TEMPERATURE – °C
50
80
40
0
-40
20
I
O
40
I
I
= 10-15 mA
I
I
= 5.0 mA