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參數(shù)資料
| 型號： | HCPL-050L-500 |
| 英文描述： | LVTTL/LVCMOS Compatible 3.3 V Optocouplers (1 Mb/s) |
| 中文描述： | LVTTL /的LVCMOS兼容3.3伏光耦（1 Mb /秒） |
| 文件頁數(shù)： | 8/11頁 |
| 文件大?。?/td> | 87K |
| 代理商： | HCPL-050L-500 |
8
Package Characteristics
Over Recommended Temperature (T
A
= 0C to 70C) unless otherwise specified.
Parameter
Sym.
Device
Input-Output
V
ISO
8-Pin DIP
Momentary
SO-8
Withstand
Voltage**
I
I-O
8-Pin DIP
Min.
3750
Typ.* Max.
Units
V rms
Test Conditions
RH < 50%,
t = 1 min.,
T
A
= 25C
Fig.
Note
6, 14
1
μ
A
45% RH, t = 5 s,
V
I-O
= 3 kVdc,
T
A
= 25C
V
I-O
= 500 Vdc
6, 16
Input-Output
Resistance
Input-Output
Capacitance
R
I-O
8-Pin DIP
SO-8
8-Pin DIP
SO-8
10
12
6
C
I-O
0.6
pF
f = 1 MHz
6
*All typicals at T
A
= 25C.
**The Input-Output Momentary Withstand Voltage is a dielectric voltage rating that should not be interpreted as an input-output continuous
voltage rating. For the continuous voltage rating refer to the IEC/EN/DIN EN 60747-5-2 Insulation Related Characteristics Table (if applicable),
your equipment level safety specification or Agilent Application Note 1074 entitled "Optocoupler Input-Output Endurance Voltage," publication
number 5963-2203E.
Notes:
1. Derate linearly above 70C free-air temperature at a rate of 0.8 mA/C (8-Pin DIP).
Derate linearly above 85C free-air temperature at a rate of 0.5 mA/C (SO-8).
2. Derate linearly above 70C free-air temperature at a rate of 1.6 mA/C (8-Pin DIP).
Derate linearly above 85C free-air temperature at a rate of 1.0 mA/C (SO-8).
3. Derate linearly above 70C free-air temperature at a rate of 0.9 mW/C (8-Pin DIP).
Derate linearly above 85C free-air temperature at a rate of 1.1 mW/C (SO-8).
4. Derate linearly above 70C free-air temperature at a rate of 2.0 mW/C (8-Pin DIP).
Derate linearly above 85C free-air temperature at a rate of 2.3 mW/C (SO-8).
5. CURRENT TRANSFER RATIO in percent is defined as the ratio of output collector current, I
O
, to the forward LED input current, I
F
, times 100.
6. Device considered a two-terminal device: Pins 1, 2, 3, and 4 shorted together and Pins 5, 6, 7, and 8 shorted together.
7. Common mode transient immunity in a Logic High level is the maximum tolerable (positive) dV
CM
/dt on the leading edge of the common
mode pulse signal, V
CM
, to assure that the output will remain in a Logic High state (i.e., V
O
> 2.0 V). Common mode transient immunity in a
Logic Low level is the maximum tolerable (negative) dV
CM
/dt on the trailing edge of the common mode pulse signal, V
CM
, to assure that the
output will remain in a Logic Low state (i.e., V
O
< 0.8 V).
8. The 1.9 k
load represents 1 TTL unit load of 1.6 mA and the 5.6 mA k
pull-up resistor.
9. The 4.1 k
load represents 1 LSTTL unit load of 0.36 mA and 6.1 k
pull-up resistor.
10. The frequency at which the AC output voltage is 3 dB below its mid-frequency value.
11. The JEDEC registration for the 6N136 specifies a minimum CTR of 15%. Agilent guarantees a minimum CTR of 15%.
12. See Option 020 data sheet for more information.
13. Use of a 0.1
μ
f bypass capacitor connected between pins 5 and 8 is recommended.
14. In accordance with UL 1577, each optocoupler is proof tested by applying an insulation test voltage
≥
4500 V rms for 1 second (leakage
detection current limit, I
I-O
≤
5
μ
A). This test is performed before the 100% Production test shown in the IEC/EN/DIN EN 60747-5-2 Insulation
Related Characteristics Table, if applicable.
15. In accordance with UL 1577, each optocoupler is proof tested by applying an insulation test voltage
≥
6000 V rms for 1 second (leakage
detection current limit, I
I-O
≤
5
μ
A). This test is performed before the 100% Production test shown in the IEC/EN/DIN EN 60747-5-2 Insulation
Related Characteristics Table, if applicable.
16. This rating is equally validated by an equivalent AC proof test.
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相關代理商/技術參數(shù) |
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