參數(shù)資料
型號(hào): HCD66727A03BP
廠商: Hitachi,Ltd.
英文描述: Low-Power Dot-Matrix Liquid Crystal Display Controller/Driver with Key Scan Function
中文描述: 低功耗點(diǎn)陣液晶顯示控制器/鍵掃描功能驅(qū)動(dòng)程序
文件頁(yè)數(shù): 22/97頁(yè)
文件大?。?/td> 513K
代理商: HCD66727A03BP
HD66727
22
Table 10
Correspondence between Segment Display SEGRAM Addresses (ASEG) and Driver
Signals in the 6-Dot Font Width
ASEG Address
Segment Signals
Common
Signal
MSB
LSB D7
D6
D5
D4
D3
D2
D1
D0
1
0
0
0
*
*
SEG1,
SEG25,
SEG49
SEG2,
SEG26,
SEG50
SEG3,
SEG27,
SEG51
SEG4,
SEG28,
SEG52
SEG5,
SEG29,
SEG53
SEG6,
SEG30,
SEG54
COMS1
1
0
0
1
*
*
SEG7,
SEG31,
SEG55
SEG8,
SEG32,
SEG56
SEG9,
SEG33,
SEG57
SEG10,
SEG34,
SEG58
SEG11,
SEG35,
SEG59
SEG12,
SEG36,
SEG60
COMS1
1
0
1
0
*
*
SEG13,
SEG37
SEG14,
SEG38
SEG15,
SEG39
SEG16,
SEG40
SEG17,
SEG41
SEG18,
SEG42
COMS1
1
0
1
1
*
*
SEG19,
SEG43
SEG20,
SEG44
SEG21,
SEG45
SEG22,
SEG46
SEG23,
SEG47
SEG24,
SEG48
COMS1
1
1
0
0
*
*
SEG1,
SEG25,
SEG49
SEG2,
SEG26,
SEG50
SEG3,
SEG27,
SEG51
SEG4,
SEG28,
SEG52
SEG5,
SEG29,
SEG53
SEG6,
SEG30,
SEG54
COMS2
1
1
0
1
*
*
SEG7,
SEG31,
SEG55
SEG8,
SEG32,
SEG56
SEG9,
SEG33,
SEG57
SEG10,
SEG34,
SEG58
SEG11,
SEG35,
SEG59
SEG12,
SEG36,
SEG60
COMS2
1
1
1
0
*
*
SEG13,
SEG37
SEG14,
SEG38
SEG15,
SEG39
SEG16,
SEG40
SEG17,
SEG41
SEG18,
SEG42
COMS2
1
1
1
1
*
*
SEG19,
SEG43
SEG20,
SEG44
SEG21,
SEG45
SEG22,
SEG46
SEG23,
SEG47
SEG24,
SEG48
COMS2
Notes: 1. When the SFT pin is grounded, the SEG1 pin output is connected to the far left of the LCD
panel, and when the SFT pin is high, the SEG60 pin output is connected to the far left.
2. SEG1 to SEG24 data are identical to SEG25 to SEG48 and SEG49 to SEG60 data.
3. The lower six bits (D5 to D0) of SEGRAM data determine on or off display for each segment. A
segment is selected (turned on) when the corresponding bit is 1, and is deselected (turned off)
when the corresponding bit is 0. The upper two bits (D7 to D6) are invalid.
Timing Generation Circuit
The timing generation circuit generates timing signals for the operation of internal circuits such as
DDRAM, CGROM, CGRAM, and SEGRAM. RAM read timing for display and internal operation timing
by MPU access are generated separately to avoid interfering with each other. Therefore, when writing data
to DDRAM, for example, there will be no undesirable interferences, such as flickering, in areas other than
the display area.
Cursor/Blink Control Circuit
The cursor/blink (or white-black inversion) control is used to produce a cursor or a flashing area on the
display at a position corresponding to the location stored in the address counter (AC).
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