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參數(shù)資料
| 型號： | HCD66108BP |
| 廠商： | Hitachi,Ltd. |
| 英文描述： | Driver IC; Package/Case:16-DIP; Mounting Type:Through Hole |
| 中文描述： | （內(nèi)存提供165通道的LCD液晶點陣圖形驅(qū)動程序） |
| 文件頁數(shù)： | 17/60頁 |
| 文件大小： | 337K |
| 代理商： | HCD66108BP |
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HD66108
970
(2) Busy Check
A busy time period appears after display memory read/write or X or Y address register write, since
post-access processing is performed synchronously with internal clock pulses. Updating data in
registers other than the address register is disabled during this time. Subsequent data must be input
after confirming ready mode by reading the address register. The busy time period is a maximum of 8
clock pulses after display memory read/write and a maximum of 1.5 clock pulses after X or Y address
register write (Figure 7).
HD66108T
OSC
BUSY
FLAG
Internal
operation
WR
CPU
RD
RS
DB7
Ready
Busy 8 clock pulses max
Operates internally
Ready
Figure 7 Relationship between Clock Pulses and Busy Time (Updating Display Data)
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