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參數(shù)資料
| 型號： | HCC4031B |
| 廠商： | 意法半導(dǎo)體 |
| 英文描述： | 64-STAGE STATIC SHIFT REGISTER |
| 中文描述： | 64階段靜態(tài)移位寄存器 |
| 文件頁數(shù)： | 1/12頁 |
| 文件大?。?/td> | 241K |
| 代理商： | HCC4031B |
HCC/HCF4031B
64-STAGE STATIC SHIFT REGISTER
DESCRIPTION
The
HCC4031B
(extended temperature range) and
HCF4031B
(intermediate temperature range) are
monolithic integrated circuits, available in 16-lead
dual in-line plastic or ceramic package.
The
HCC/HCF4031B
is a static shift register that
contains 64 D-type, master-slave flip-flop stages
and onestagewhichisa D-type master flip-floponly
(referred to as a 1/2 stage). The logic level present
at the DATA input is transferred into the first stage
and shifted one stage at each positive-going clock
transition. Maximum clock frequencies up to 16
Megahertz(typical) can be obtained. Because fully
static operation is allowed, information can be per-
manentlystored with the clock line in either the low
or high state. The
HCC/HCF4031B
has a MODE
CONTROL input that, when in thehigh state, allows
operation in the recirculating mode. The MODE
CONTROLinputcan alsobeusedtoselectbetween
two separate data sources. Register packages can
be cascaded and the clock lines driven directly for
high-speed operation. Alternatively, adelayed clock
output(CL
D
) isprovided thatenables cascading reg-
.
FULLY STATIC OPERATION : DC to 16MHz
(TYP.) @ V
DD
– V
SS
= 15V
.
STANDARD TTL DRIVE CAPABILITY ON Q
OUTPUT
.
RECIRCULATION CAPABILITY
.
THREE CASCADING MODES:
DIRECT
CLOCKING
OPERATION
DELAYEDCLOCKINGFORREDUCEDCLOCK
DRIVE REQUIREMENTS
ADDITIONAL1/2 STAGEFORSLOWCLOCKS
.
QUIESCENT CURRENT SPECIFIED TO 20V
FOR HCC DEVICE
.
STANDARDIZED, SYMMETRICAL OUTPUT
CHARACTERISTICS
.
5V, 10V, AND 15V PARAMETRIC RATINGS
.
INPUT CURRENTOF 100nA at 18V AND 25
°
C
FOR HCC DEVICE
.
100% TESTEDFOR QUIESCENTCURRENT
.
MEETSALLREQUIREMENTSOFJEDECTEN-
TATIVE STANDARD N
O
. 13A, ”STANDARD
SPECIFICATIONS FOR DESCRIPTION OF ”B”
SERIESCMOS DEVICES”
FOR
HIGH-SPEED
June 1989
EY
(Plastic Package)
F
(Ceramic Package)
C1
(ChipCarrier)
ORDERCODES :
HCC4031BF
HCF4031BEY
HCF4031BC1
PIN CONNECTIONS
1/12
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| HCF4031 | 64-STAGE STATIC SHIFT REGISTER |
| HCC4031BF | 64-STAGE STATIC SHIFT REGISTER |
| HCF4031BC1 | Differential Bus Transceiver 8-SOIC 0 to 70 |
| HCF4031BEY | Differential Bus Transceiver 8-SOIC 0 to 70 |
| HCC4033BC1 | 7-SEGMENT DISPLAY OUTPUTS DECADE COUNTERS/DIVIDERS WITH DECODED |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| HCC4031BF | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:64-STAGE STATIC SHIFT REGISTER |
| HCC4032B | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:TRIPLE SERIAL ADDERS |
| HCC4032BC1 | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:TRIPLE SERIAL ADDERS |
| HCC4032BD | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Logic IC |
| HCC4032BEY | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:TRIPLE SERIAL ADDERS |
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