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參數(shù)資料
| 型號： | HCC4027B |
| 廠商： | 意法半導體 |
| 英文描述： | Dual Line Receiver 14-PDIP 0 to 70 |
| 中文描述： | 雙- JK主從觸發(fā)器 |
| 文件頁數(shù)： | 1/12頁 |
| 文件大?。?/td> | 286K |
| 代理商： | HCC4027B |
HCC/HCF4027B
DUAL-J-K MASTER-SLAVE FLIP-FLOP
DESCRIPTION
.
SET-RESET CAPABILITY
.
STATIC FLIP-FLOP OPERATION - RETAINS
STATE INDEFINITELY WITH CLOCK LEVEL
EITHER”HIGH” OR ”LOW”
.
MEDIUM SPEED OPERATION - 16MHz (typ.
clock toggle rate at 10V)
.
STANDARDIZED
CHARACTERISTICS
.
QUIESCENT CURRENT SPECIFIED TO 20V
FOR HCC DEVICE
.
INPUT CURRENTOF100nA AT18V AND 25
°
C
FOR HCC DEVICE
.
100% TESTEDFOR QUIESCENTCURRENT
.
MEETSALLREQUIREMENTSOFJEDECTEN-
TATIVE STANDARD N
0
. 13A, ”STANDARD
SPECIFICATIONS FOR DESCRIPTION OF ”B”
SERIESCMOS DEVICES”.
SYMMETRICAL
OUTPUT
June 1989
The
HCC4027B
(extended temperature range) and
HCF4027B
(intermediate temperature range) are
monolithic integrated circuit, available in 16-lead
dual in-line plastic or ceramic package and plastic
micro package.
The
HCC/HCF4027B
is a single monolithic chip in-
tegratedcircuit containing twoidentical complemen-
tary-symmetry J-K master-slave flip-flops. Each
flip-flophasprovisions forindividual J,K,Set,Reset,
and Clock input signals, Buffered Q and Q signals
are provided as outputs. Thisinput-output arrange-
ment provides for compatible operation with the
HCC/HCF4013B
dual D-type flip-flop.
The
HCC/HCF4027B
isuseful inperforming control,
register, and togglefunctions. Logic levels present
at theJand Kinputs along with internal self-steering
controlthestateofeachflip-flop ;changes in theflip-
flop state are synchronous with the positive-going
transition ofthe clock pulse. Set and reset functions
are independent of the clock and are initiated when
a high level signal is present at either the Set or
Reset input.
EY
(Plastic Package)
F
(Ceramic FritSeal Package)
ORDERCODES :
HCC4027BF
HCF4027BEY
HCF4027BM1
HCF4027BC1
PIN CONNECTIONS
M1
(Micro Package
)
C1
(Plastic Chip Carrier)
1/12
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| HCC4027BF | Dual Line Receiver 14-PDIP 0 to 70 |
| HCF4027BC1 | DUAL-J-K MASTER-SLAVE FLIP-FLOP |
| HCF4028BM1 | BCD-TO-DECIMAL DECODER |
| HCC4028B | BCD-TO-DECIMAL DECODER |
| HCC4028BF | BCD-TO-DECIMAL DECODER |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| HCC4027BD | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Logic IC |
| HCC4027BF | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:DUAL-J-K MASTER-SLAVE FLIP-FLOP |
| HCC4027BK | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Logic IC |
| HCC4028B | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:RadHardened high voltage complementary MOS logic series |
| HCC4028BD | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Logic IC |
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