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參數(shù)資料
| 型號(hào)： | HCC4018B |
| 廠商： | 意法半導(dǎo)體 |
| 元件分類： | 通用總線功能 |
| 英文描述： | Presettable Divide-By-N Counter(可復(fù)位除法計(jì)數(shù)器) |
| 中文描述： | 預(yù)置分頻氮計(jì)數(shù)器（可復(fù)位除法計(jì)數(shù)器） |
| 文件頁(yè)數(shù)： | 1/12頁(yè) |
| 文件大?。?/td> | 272K |
| 代理商： | HCC4018B |
HCC/HCF4018B
PRESETTABLE DIVIDE-BY-N COUNTER
DESCRIPTION
The HCC4018B
(extended temperature range)and
HCF4018B
(intermediate temperature range) are
monolithic integrated circuit, available in 16-lead
dual in-line plastic or ceramic package and plastic
micropackage.
The
HCC/HCF4018B
types consist of 5 Johnson-
Counter stages, buffered Q outputs from each
stage, and counter preset control gating. CLOCK,
RESET,DATA, PRESETENABLE, and 5 individual
JAM inputs are provided. Divide by 10, 8, 6, 4, or 2
counter configurations canbe implementedbyfeed-
ing the Q5, Q4, Q3, Q2, Q1 signals, respectively,
back to the DATA input.
Divide-by-9, 7,5, or3 counterconfigurations can be
implemented by the useof a
HCC/HCF4011B
gate
package to properly gate the feedback connection
to theDATA input. Divide-by-functions greater than
10 can be achieved by use of multiple
HCC/HCF
4018B
units. The counter is advanced one count at
the positive clock-signal transition. Schmitt Trigger
action on the clock line permits unlimited clock rise
and fall times. A high RESET signal clears the
counter to an all-zero condition. A highPRESENT-
ENABLE signal allows information on the JAM in-
puts to preset the counter. Anti-lock gating is
provided to assure theproper counting sequence.
.
MEDIUM SPEED OPERATION - 10MHz (typ.)
AT V
DD
– V
SS
= 10V
.
FULLY STATIC OPERATION
.
QUIESCENT CURRENT SPECIFIED TO 20V
FOR HCC DEVICE
.
STANDARDIZED
CHARACTERISTICS
.
INPUT CURRENTOF100nA AT18V AND 25
°
C
FOR HCC DEVICE
.
100% TESTEDFOR QUIESCENTCURRENT
.
5V, 10V, AND 15V PARAMETRIC RATINGS
.
MEETSALLREQUIREMENTSOFJEDECTEN-
TATIVE STANDARD N
o
SPECIFICATIONS FOR DESCRIPTION OF ”B”
SERIESCMOS DEVICES”
SYMMETRICAL
OUTPUT
13A, ”STANDARD
June1989
EY
(Plastic Package)
F
(Ceramic Frit SealPackage)
C1
(Plastic Chip Carrier)
ORDERCODES :
HCC4018BF
HCF4018BEY
HCF4018BM1
HCF4018BC1
PIN CONNECTIONS
M1
(Micro Package)
1/12
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| HCF4018B | Presettable Divide-By-N Counter() |
| HCC4018 | 16384 x 36 Synchronous FIFO Memory 128-LQFP 0 to 70 |
| HCC4018BF | 32768 x 36 Synchronous FIFO Memory 128-LQFP 0 to 70 |
| HCC40192BM1 | PRESETTABLE UP/DOWN COUNTERS (DUAL CLOCK WITH RESET) 40192B BCD TYPE 40193B BINARY TYPE |
| HCF40192BM1 | PRESETTABLE UP/DOWN COUNTERS (DUAL CLOCK WITH RESET) 40192B BCD TYPE 40193B BINARY TYPE |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| HCC4018BD | 制造商:STMicroelectronics 功能描述:LOGIC, 18VOLTCOUNTERPRESETTABLE DIVIDE-BY N COUNTERDIL-16 SO - Bulk 制造商:STMicroelectronics 功能描述:SPACE LEVEL: - Bulk |
| HCC4018BF | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:PRESETTABLE DIVIDE-BY-N COUNTER |
| HCC4018BK | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Logic IC |
| HCC40192B | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:PRESETTABLE UP/DOWN COUNTERS (DUAL CLOCK WITH RESET) 40192B BCD TYPE 40193B BINARY TYPE |
| HCC40192BC1 | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:PRESETTABLE UP/DOWN COUNTERS (DUAL CLOCK WITH RESET) 40192B BCD TYPE 40193B BINARY TYPE |
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