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參數(shù)資料
| 型號： | HC3-5560-5 |
| 廠商： | HARRIS SEMICONDUCTOR |
| 元件分類： | 數(shù)字傳輸電路 |
| 英文描述： | PCM Transcoder |
| 中文描述： | DATACOM, PCM TRANSCEIVER, PDIP20 |
| 文件頁數(shù)： | 9/9頁 |
| 文件大?。?/td> | 67K |
| 代理商： | HC3-5560-5 |
77
All Intersil semiconductor products are manufactured, assembled and tested under
ISO9000
quality systems certification.
Intersil semiconductor products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time with-
out notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see web site
http://www.intersil.com
FIGURE 7. DECODE TIMING AND DELAY
Data that appears on A
IN
and B
IN
is clocked by the positive edge of CLK DEC, decoded, and zeros are inserted for all valid line
code substitutions. The data then appears in non-return to zero to zero form at output NRZ Data Out. A
IN
and B
IN
are
interchangeable.
FIGURE 8.
The ERROR signal indicates bipolar violations that are not part of a valid substitution.
Timing Waveforms
(Continued)
4 CYCLES
6 CYCLES
8 CYCLES
NRZ DATA OUT
B
IN
A
IN
B8ZS
B
IN
A
IN
B
IN
A
IN
B
IN
A
IN
NRZ DATA OUT
NRZ DATA OUT
NRZ DATA OUT
B6ZS
HDB3
AMI
CLK DEC
S
S
S
S
S
S
S
S
S
S
S
S
S
S
S
S
S
S
S
S
S
S
S
S
S
S
S
E
E
S
S
S
E
NRZ DATA
OUT
B
IN
A
IN
ERROR
CLK DEC
HC-5560
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