參數(shù)資料
型號(hào): HB56A432BR-7
英文描述: x32 Fast Page Mode DRAM Module
中文描述: X32號(hào)快速頁(yè)面模式內(nèi)存模塊
文件頁(yè)數(shù): 6/7頁(yè)
文件大?。?/td> 105K
代理商: HB56A432BR-7
HB56A140BR Series
6
DC Characteristics
(Ta = 0 to +70
°
C, V
CC
= 5 V
±
5%, V
SS
= 0 V)
HB56A140BR
60 ns
70 ns
80 ns
Parameter
Symbol Min
Max
Min
Max
Min
Max
Unit Test Conditions
Notes
Operating current
I
CC1
I
CC2
1100
1000
900
mA
t
RC
= min
TTL interface
RAS
,
CAS
= V
IH
Dout = High-Z
1, 2
Standby current
20
20
20
mA
10
10
10
mA
CMOS interface
RAS
,
CAS
V
CC
0.2V
Dout = High-Z
Standby current
(L-version)
I
CC2
1
1
1
mA
CMOS interface
RAS
,
CAS
= V
WE
,
OE
, address,
Din = V
or V
IL
Dout = High-Z
4
RAS
-only refresh
current
I
CC3
1100
1000
900
mA
t
RC
= min
2
Standby current
I
CC5
50
50
50
mA
RAS
= V
,
CAS
= V
IL
Dout = enable
1
CAS
-before-
RAS
refresh current
I
CC6
1100
1000
900
mA
t
RC
= min
Fast page mode
current
I
CC7
1100
1000
900
mA
t
PC
= min
1, 3
Battery backup
operation current
(CBR refresh)
(L-version)
I
CC10
2
2
2
mA
t
= 125
μ
s, t
RAS
1
μ
s
WE
= V
,
CAS
= V
OE
, address, Din = V
IH
or V
IL
, Dout = High-Z
0 V
Vin
7 V
4
Input leakage
current
I
LI
10
10
10
10
10
10
μ
A
Output leakage
current
I
LO
10
10
10
10
10
10
μ
A
0 V
Vout
7 V
Dout = disable
Output high voltage V
OH
Output low voltage
Notes: 1. I
depends on output load condition when the device is selected. I
CC
max is specified at the output
open condition.
2. Address can be changed once or less while
RAS
= V
IL
.
3. Address can be changed once or less while
CAS
= V
IH
.
4. V
CC
0.2 V
V
IH
6.5 V, 0 V
V
IL
0.2 V.
2.4
V
CC
0.4
2.4
V
CC
0.4
2.4
V
CC
0.4
V
Iout =
5 mA
V
OL
0
0
0
V
Iout = 4.2 mA
This Material Copyrighted by Its Respective Manufacturer
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