參數(shù)資料
型號(hào): HB28J512MM3
廠商: Renesas Technology Corp.
英文描述: MultiMediaCard 32 MByte/64 MByte/128 MByte/256 MByte/512 MByte
中文描述: 多媒體32 MByte/64 MByte/128 MByte/256 MByte/512字節(jié)
文件頁數(shù): 13/91頁
文件大小: 526K
代理商: HB28J512MM3
HB28K032/L064/J128/J256/J512MM3, HB28K032/L064/J128/J256RM3
Rev.0.02, Sep.15.2004, page 13 of 89
SPEC_VERS
Defines the Spec version supported by the card. It includes the commands set definition and the definition
of the card responses. The card identification procedure is compatible for all spec versions!
SPEC Version
SPEC_VERS
System specification version number
0011
System specification version 3.3
The Spec version of these Renesas MultiMediaCards is related to the “MultiMediaCard system
specification, Version 3.3”. The parameter SPEC_VERS has permanently the value “0011”.
TAAC
Defines the asynchronous data access time:
TAAC Access Time Definition
TAAC bit
Description
Values
2:0
Time exponent
0 = 1 ns, 1 = 10 ns, 2 = 100 ns, 3 = 1
μ
s, 4 = 10
μ
s,
5 = 100
μ
s, 6 = 1 ms, 7 = 10 ms
0 = reserved, 1 = 1.0, 2 = 1.2, 3 = 1.3, 4 = 1.5,
5 = 2.0, 6 = 2.5, 7 = 3.0, 8 = 3.5, 9 = 4.0, A = 4.5,
B = 5.0, C = 5.5, D = 6.0, E = 7.0, F = 8.0
6:3
Time mantissa
7
Reserved
Always
0
The value for the asynchronous delay for these Renesas MultiMediaCards is 1 ms. The coded TAAC value
is 0x0E (= 1 ms). For more details refer to Chapter “Operating Characteristics”.
NSAC
Defines the worst case for the synchronous data access time. The unit for NSAC is 100-clock cycles.
Therefore, maximum value for the data access time is 25.6k clock cycles. The total access time N
AC
as
expressed in the Table “Timing Values” is the sum of both TAAC and NSAC. It has to be computed by
the host for the actual clock rate. The read access time should be interpreted as a typical delay for the first
data bit of a data block or stream. The value of NSAC for these Renesas MultiMediaCards is 0x01 (100-
clock cycles). For more details refer to Chapter “Operating Characteristics”.
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