參數(shù)資料
型號： HA5352IB
廠商： INTERSIL CORP
元件分類： 運(yùn)動控制電子
英文描述： Fast Acquisition Dual Sample and Hold Amplifier
中文描述： 2 CHANNEL, SAMPLE AND HOLD AMPLIFIER, 90 us ACQUISITION TIME, PDSO16
封裝： 0.300 INCH, PLASTIC, SOIC-16
文件頁數(shù)： 1/5頁
文件大?。?/td> 133K
代理商： HA5352IB
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143
|
Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright Intersil Americas Inc. 2002. All Rights Reserved
3-1
HA5352
Fast Acquisition
Dual Sample and Hold Amplifier
Description
The HA5352 is a fast acquisition, wide bandwidth Dual Sam-
ple and Hold amplifier built with the Intersil HBC-10 BiCMOS
process. This Sample and Hold amplifier offers the combina-
tion of features; fast acquisition time (70ns to 0.01%), excel-
lent DC precision and extremely low power dissipation,
making it ideal for use in multi-channel systems that require
low power.
The HA5352 comes in an open loop configuration with fully
differential inputs providing flexibility for user defined feed-
back. In unity gain the HA5352 is completely self-contained
and requires no external components. The on-chip 15pF
hold capacitors are completely isolated to minimize droop
rate and reduce the sensitivity of pedestal error. The
HA5352 Dual Sample and Hold is available in a 14 lead
PDIP and 16 lead SOIC packages saving board space while
its pinout is designed to simplify layout.
Ordering Information
PART
NUMBER
TEMPERATURE
RANGE
PACKAGE
HA5352IP
-40
o
C to +85
o
C
14 Lead Plastic DIP
HA5352IB
-40
o
C to +85
o
C
16 Lead Plastic SOIC (W)
Features
Fast Acquisition to 0.01% . . . . . . . . . . . . . . .70ns (Max)
Low Offset Error
. . . . . . . . . . . . . . . . . . . . . . . .±
2mV (Max)
Low Pedestal Error
. . . . . . . . . . . . . . . . . . . . .±
10mV (Max)
Low Droop Rate . . . . . . . . . . . . . . . . . . . . . 2
μ
V/
μ
s (Max)
Wide Unity Gain Bandwidth . . . . . . . . . . . . . . . . 40MHz
Low Power Dissipation per Amp . . . . . . .220mW (Max)
Total Harmonic Distortion (Hold Mode). . . . . . . -72dBc
(V
IN
= 5V
P-P
at 1MHz)
Fully Differential Inputs
On Chip Hold Capacitor
Applications
Synchronous Sampling
Wide Bandwidth A/D Conversion
Deglitching
Peak Detection
High Speed DC Restore
May 1997
Pinouts
HA5352 (300 mil SOIC)
TOP VIEW
HA5352 (PDIP)
TOP VIEW
14
15
16
9
13
12
11
10
1
2
3
4
5
7
6
8
GND1
-IN
+IN
NC
V1-
+IN2
GND2
-IN2
V1+
NC
OUT1
V2-
OUT2
S/H2 CONTROL
V2+
S/H1 CONTROL
S/H1
S/H2
GND1
-IN1
+IN1
V1-
+IN2
-IN2
GND2
V1+
S/H1 CONTROL
OUT1
V2-
OUT2
S/H2 CONTROL
V2+
1
2
3
4
5
6
7
14
13
12
11
10
9
8
File Number
3394.5
NOT RECOMMENDED FOR NEW DESIGNS
See HA5351
contact our Technical Support Center at
i-888-INTERSIL or www.intersil.com/tsc
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