3
FN3680.6
March 8, 2007
AC Test Circuit
500
Ω
400
Ω
510
Ω
75
Ω
VOUT
VIN
75
Ω
RS
HA4201
HFA1100
+
-
CX
10k
Ω
NOTE:
CL = CX + Test Fixture Capacitance.
PC Board Layout
The frequency response of this circuit depends greatly on
the care taken in designing the PC board. The use of low
inductance components such as chip resistors and chip
capacitors is strongly recommended, while a solid
ground plane is a must!
Attention should be given to decoupling the power supplies.
A large value (10
μF) tantalum in parallel with a small value
(0.1
μF) chip capacitor works well in most cases.
Keep input and output traces as short as possible, because
trace inductance and capacitance can easily become the
performance limiting items.
Application Information
General
The HA4201 is a 1x1 crosspoint switch that is ideal for the
matrix element in small, high input-to-output isolation
switchers and routers. It also excels as an input buffer for
routers with a large number of outputs (i.e. each input must
connect to a large number of outputs) and delivers
performance superior to most video amplifiers at a fraction of
the cost. As an input buffer, the HA4201’s low input
capacitance and high input resistance provide excellent
video terminations when used with an external 75
Ω resistor.
This crosspoint contains no feedback or gain setting
resistors, so the output is a true high impedance load when
the IC is disabled (EN = 0).
Frequency Response
Most applications utilizing the HA4201 require a series
output resistor, RS, to tune the response for the specific load
capacitance, CL, driven. Bandwidth and slew rate degrade
as CL increases (as shown in the Electrical Specification
table on
page 2), so give careful consideration to component
placement to minimize trace length. As an example, -3dB
bandwidth decreases to 160MHz for CL = 100pF, RS = 0Ω.
In big matrix configurations where CL is large, better
frequency response is obtained by cascading two levels of
crosspoints in the case of multiplexed outputs (see Figure
2),or distributing the load between two drivers if CL is due to
bussing and subsequent stage input capacitance.
±0.1dB Flat Bandwidth
RS = 82Ω, CL = 10pF
25
-
250
-
MHz
RS = 43Ω, CL = 15pF
25
-
175
-
MHz
RS = 36Ω, CL = 21pF
25
-
170
-
MHz
Input Resistance
Full
200
400
-
k
Ω
Input Capacitance
Full
-
1.0
-
pF
Enabled Output Resistance
Full
-
15
-
Ω
Disabled Output Capacitance
VEN = 0.8V
Full
-
2.0
-
pF
Differential Gain
25
-
0.01
0.02
%
Differential Phase
25
-
0.01
0.02
Degrees
Off Isolation
1VP-P, 100MHz, VEN = 0.8V, RL = 10Ω
Full
-
85
-
dB
Slew Rate
(1.5VP-P, +SR/-SR)
RS = 82Ω, CL = 10pF
25
-
1750/1770
-
V/
μs
RS = 43Ω, CL = 15pF
25
-
1460/1360
-
V/
μs
RS = 36Ω, CL = 21pF
25
-
1410/1360
-
V/
μs
Total Harmonic Distortion (Note
3)Full
-
0.01
0.1
%
Disabled Output Resistance
Full
-
12
-
M
Ω
NOTE:
3. This parameter is not tested. The limits are guaranteed based on lab characterization, and reflect lot-to-lot variation.
Electrical Specifications
VSUPPLY = ±5V, RL = 10kΩ, VEN = 2.0V, Unless Otherwise Specified (Continued)
PARAMETER
TEST CONDITIONS
TEMP.
(°C)
MIN
TYP
MAX
UNITS
HA4201