參數(shù)資料
型號(hào): HA17524P
廠商: Hitachi,Ltd.
元件分類: FPGA
英文描述: 3000000 SYSTEM GATE 1.5 VOLT FPGA
中文描述: 開關(guān)穩(wěn)壓器控制器
文件頁數(shù): 12/18頁
文件大?。?/td> 88K
代理商: HA17524P
HA17524P/FP
12
Electrical Characteristics
(V
CC
= 20 V, f = 20 kHz, Ta = 25°C)
Item
Symbol
Min
Typ
Max
Unit
Test Conditions
Regulator
Output voltage
V
REF
δ
V
OLine
R
REJ
δ
V
OLoad
δ
V
O
/
δ
Ta
4.6
5.0
5.4
V
Input regulation
10
30
mV
V
CC
= 8 to 40 V
f = 120 Hz
Ripple rejection
66
dB
Output regulation
20
50
mV
Iout = 0 to 20 mA
Output voltage
change with
output temperature
0.3
1.0
%
Ta = 0 to +70
°
C
Ta = –20 to +75
°
C
0.4
1.36
%
Short-circuit output
current (Note)
I
OS
100
mA
V
REF
= 0
Error
amplifier
Input offset voltage V
IO
Input bias current
2
10
mV
V
IC
= 2.5 V
V
IC
= 2.5 V
I
I
A
VD
2
10
μ
A
Open-loop voltage
gain
60
dB
Common-mode
input voltage range
V
CM
1.8 to 3.4
V
Ta = 25
°
C
Common-mode
Rejection ratio
CMR
70
dB
Unity-gain
bandwidth
BW
3
MHz
Output swing
V
OPP
f
0.5
3.8
V
Oscillator
OSC frequency
450
kHz
C
T
= 0.001
μ
F,
R
T
= 2 k
V
CC
= 8 to 40 V,
R
= 1.8 to 100 k
,
C = Const
Standard deviation
of frequency
f
5
%
Frequency stability
δ
f
Line
δ
f/
δ
Ta
1.0
%
V
CC
= 8 to 40 V
Ta = 0 to +70
°
C
Ta = –20 to +75
°
C
5.0
10
%
5.0
13.6
%
Output amplitude
V
3(peak)
T
P
Dmax
3.5
V
Pin 3
Output pulse width
0.5
μ
s
C
T
= 0.01
μ
F, Pin 3
Comparator Maximum duty
cycle
45
%
Threshold voltage
Vth
0
Vth max
1.0
V
Duty cycle = 0
3.5
V
Duty cycle = max
Input bias current
Duration of the short-circuit should not exceed one second.
I
I
–1
μ
A
Note:
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