參數(shù)資料
型號(hào): HA16116FP
廠(chǎng)商: Hitachi,Ltd.
元件分類(lèi): FPGA
英文描述: 1500000 SYSTEM GATE 1.5 VOLT FPGA
中文描述: 開(kāi)關(guān)穩(wěn)壓器的斬波式直流/直流轉(zhuǎn)換器
文件頁(yè)數(shù): 4/34頁(yè)
文件大?。?/td> 250K
代理商: HA16116FP
HA16116FP/FPJ, HA16121FP/FPJ
4
Pin Functions
Pin No.
Symbol
Function
1
S.GND
Signal circuitry*
1
ground
2
C
T
R
T
IN(+)1
Timing capacitance (triangle wave oscillator output)
3
Timing resistance (for bias current synchronization)
4
Error amp. noninverting input (1)
Channel 1
5
IN(–)1
Error amp. inverting input (1)
6
E/O1
Error amp. output (1)
7
DB1
Dead band timer off period adjustment input (1)
8
CL1
Overcurrent detection input (1)
9
OUT1
PWM pulse output (1)
10
P.GND
Output stage*
1
ground
11
P.V
IN
OUT2
Output stage*
1
power supply input
12
PWM pulse output (2)
Channel 2
13
CL2
Overcurrent detection input (2)
14
DB2
Dead band timer off period adjustment input (2)
15
E/O2
Error amp. output (2)
16
IN(–)2
ON/
OFF
Error amp. inverting input (2)*
2
17
IC on/off switch input (off when grounded)
18
TIM
Setting of intermittent operation timing when overcurrent is detected
(collector input of timer transistor)
19
Vref
2.5 V reference voltage output
20
Notes: 1. Here “output stage” refers to the power MOS FET driver circuits, and “signal circuitry” refers to all
other circuits on the IC. Note that this IC is not protected against reverse insertion, which can
cause breakdown of the IC between V
IN
and GND. Be careful to insert the IC correctly.
2. Noninverting input of the channel 2 error amp is connected internally to Vref.
S.V
IN
Signal circuitry*
1
power supply input
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