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參數(shù)資料
| 型號(hào)： | HA12240FP |
| 廠商： | Renesas Technology Corp. |
| 英文描述： | 150000 SYSTEM GATE 1.8 VOLT FPGA - NOT RECOMMENDED for NEW DESIGN |
| 中文描述： | 總線接口驅(qū)動(dòng)器/接收器IC |
| 文件頁數(shù)： | 4/24頁 |
| 文件大?。?/td> | 163K |
| 代理商： | HA12240FP |
HA12240FP
Rev.1.0, Dec.01.2003, page 4 of 23
Electrical Characteristics
(cont.)
(V
CC
= 5.0 V, Ta = 25°C)
Test
Pin
Item
Symbol
Min
Typ
Max
Unit
Test Conditions
Test
Circuit
High-level input voltage
(1)
V
IH1
—
80
110
mV
V6 = 0
→
5 V, Pin2 = 4 V or more,
V1 = 0 V, V3 = 0 V, V5 = 0 V,
V
IH1
= V6 – V5
V6 = 0
→
5 V, Pin2 = 4 V or more,
V1 = 0 V, V3 = 0 V, V5 = 4.5 V,
V
IH2
= V6 – V5
V6 = 5
→
0 V, Pin2 = 1 V or less,
V1 = 0 V, V3 = 0 V, V5 = 0 V,
V
IL1
= V6 – V5
V6 = 5
→
0 V, Pin2 = 1 V or less,
V1 = 0 V, V3 = 0 V, V5 = 4.5 V,
V
IL2
= V6 – V5
V
IHYS1
= V
IH1
– V
IL1
2
High-level input voltage
(2)
V
IH2
—
80
110
mV
2
Low-level input voltage
(1)
V
IL1
30
50
—
mV
2
Low-level input voltage
(2)
V
IL2
30
50
—
mV
2
Fig. 2
Input hysteresis
voltage (1)
Input hysteresis
voltage (2)
V
IHYS1
15
30
45
mV
V
IHYS2
15
30
45
mV
V
IHYS2
= V
IH2
– V
IL2
High-level common-
mode input voltage
V
IHCOM
4.5
—
—
V
V5 = 0
→
5 V, V5 when pin2 = 4 V
or less, V1 = 0 V, V3 = 0 V,
V6 – V5 = 110 mV
V5 = 0
→
5 V, V5 when pin2 = 0.3
V or more, V1 = 0 V, V3 = 0 V,
V6 – V5 = 30 mV
5
Low-level common-
mode input voltage
V
ILCOM
5
—
—
V
5
Fig. 2
Input resistance *
1
R
I
25
35
45
V1 = 0 V, V3 = 0 V, V8 = 5 V,
R
I
= 0.6 V/(I6A – I6B)
V1 = 5 V, V3 = 0 V, V8 = 5 V
5, 6
Fig. 3
High-level output
leakage current 1
I
OH1
—
—
1
μ
A
2
High-level output
leakage current 2
High-level output
leakage current 3
I
OH2
—
—
1
μ
A
V
CC
= 0 V, V1,V3,V8 = 0 V
2
I
OH3
—
—
1
μ
A
V1,V3,V8 = 0 V
2
Low-level output
voltage 1
V
OL1
—
—
0.6
V
V1 = 0 V, V3 = 0 V, V8 = 5 V,
Adjust V
RL
to make apply current =
1.5 mA
V1 = 0 V, V3 = 0 V, V8 = 5 V,
Adjust V
RL
to make apply current =
200
μ
A
2
Receiver
Low-level output
voltage 2
V
OL2
—
—
0.3
V
2
Fig. 1
Quiescent current 1
Quiescent current 2
Driver delay time (L
→
H)
Driver delay time (H
→
L)
Receiver delay time (L
→
H)
Receiver delay time (H
→
L)
Note: 1. Measure the current when V6 = (V
OP+
) + 0.3 V to make I6A and measure the current when V6 = (V
OP+
) – 0.3
V to make I6B.
I
CC
H
I
CC
L
T
TR1
T
TR2
T
DLY1
T
DLY2
4.5
1.05
6.5
1.46
8.5
1.87
mA
mA
V1 = 5 V, V3 = 0 V
V1 = 0 V, V3 = 0 V
7
7
Fig. 1
Fig. 1
—
—
100
100
300
300
ns
ns
See operating waveform figure
See operating waveform figure
5, 6
5, 6
—
—
600
200
1200
600
ns
ns
See operating waveform figure
See operating waveform figure
2
2
Fig. 5
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