Appendix B Internal I/O Registers
Rev. 7.00 Mar 10, 2005 page 560 of 652
REJ09B0042-0700
LVDSR—Low-Voltage Detection Status Register
Note: This register is implemented on the H8/38124 Group only.
H'87
LVDC
Bit
Initial value
Read/Write
Note:
*
These bits initialized by resets trigged by LVDR.
7
OVF
0
*
R/W
6
0
R/W
5
0
R/W
0
LVDUF
0
*
R/W
2
0
R/W
1
LVDDF
0
*
R/W
4
0
R/W
LVD Power Supply Voltage Rise Flag
0
[Clearing condition]
When 0 is written after reading 1
[Setting condition]
When the power supply voltage drops below
Vint(D) while the LVDUE bit in LVDCR is set
to 1, and it rises above Vint(U) before
dropping below Vreset1
(initial v alue)
1
LVD Power Supply Voltage Drop Flag
0
[Clearing condition]
When 0 is written after reading 1
[Setting condition]
When the power supply voltage drops below Vint(D)
(initial value)
1
Reference Voltage External Input Select
0
The on-chip circuit is used to generate the reference
voltage
The reference voltage is input to the Vref pin from
an external source
(initial value)
1
LVD Reference Voltage Stabilized Flag
0
[Clearing condition]
When 0 is written after reading 1
[Setting condition]
When the low-voltage detection counter (LVDCNT) overflows
(initial value)
1
3
VREFSEL
0
R/W