參數(shù)資料
型號(hào)： GVT1256DA18B-6
英文描述： x18 Fast Synchronous SRAM
中文描述： x18快速同步SRAM
文件頁(yè)數(shù)： 14/24頁(yè)
文件大小： 293K
代理商： GVT1256DA18B-6
CY7C1347C/GVT71128DA36
CY7C1327C/GVT71256DA18
14
Identification Register Definitions
Instruction Field
512K x 18
Description
REVISION NUMBER
(31:28)
XXXX
Reserved for revision number.
DEVICE DEPTH
(27:23)
00111
Defines depth of words.
DEVICE WIDTH
(22:18)
00011
Defines width of bits.
RESERVED
(17:12)
XXXXXX
Reserved for future use.
CYPRESS JEDEC ID CODE (11:1)
00011100100
Allows unique identification of DEVICE vendor.
ID Register Presence
Indicator (0)
1
Indicates the presence of an ID register.
Scan Register Sizes
Register Name
Bit Size (x18)
Instruction
3
Bypass
1
ID
32
Boundary Scan
51
Instruction Codes
Instruction
Code
Description
EXTEST
000
Captures I/O ring contents. Places the boundary scan register between TDI
and TDO. Forces all device outputs to High-Z state. This instruction is not
IEEE 1149.1-compliant.
IDCODE
001
Preloads ID register with vendor ID code and places it between TDI and
TDO. This instruction does not affect device operations.
SAMPLE-Z
010
Captures I/O ring contents. Places the boundary scan register between TDI
and TDO. Forces all device outputs to High-Z state.
RESERVED
011
Do not use these instructions; they are reserved for future use.
SAMPLE/PRELOAD
100
Captures I/O ring contents. Places the boundary scan register between TDI
and TDO. This instruction does not affect device operations. This instruction
does not implement IEEE 1149.1 PRELOAD function and is therefore not
1149.1-compliant.
RESERVED
101
Do not use these instructions; they are reserved for future use.
RESERVED
110
Do not use these instructions; they are reserved for future use.
BYPASS
111
Places the bypass register between TDI and TDO. This instruction does not
affect device operations.
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