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參數(shù)資料
| 型號(hào)： | GS882V18BB-333I |
| 廠商： | GSI TECHNOLOGY |
| 元件分類： | DRAM |
| 英文描述： | 512K x 18, 256K x 36 9Mb SCD/DCD Sync Burst SRAMs |
| 中文描述： | 512K X 18 CACHE SRAM, 4.5 ns, PBGA119 |
| 封裝： | FBGA-119 |
| 文件頁數(shù)： | 9/36頁 |
| 文件大?。?/td> | 732K |
| 代理商： | GS882V18BB-333I |
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GS882V18/36BB/D-333/300/250/200
Rev: 1.02 3/2005
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
9/36
2004, GSI Technology
Mode Pin Functions
Note:
There are pull-up devices onthe ZQ, SCD, and FT pins and a pull-down device on the ZZ pin, so those input pins can be unconnected and the
chip will operate in the default states as specified in the above tables.
Burst Counter Sequences
BPR 1999.05.18
Mode Name
Pin Name
State
L
H
L
H or NC
L or NC
Function
Linear Burst
Interleaved Burst
Flow Through
Pipeline
Active
Standby, I
DD
= I
SB
Dual Cycle Deselect
Single Cycle Deselect
High Drive (Low Impedance)
Low Drive (High Impedance)
Activate DQPx I/Os (x18/x36 mode)
Deactivate DQPx I/Os (x16/x32 mode)
Burst Order Control
LBO
Output Register Control
FT
Power Down Control
ZZ
H
Single/Dual Cycle Deselect Control
SCD
L
H or NC
L
H or NC
L
H or NC
FLXDrive Output Impedance Control
ZQ
9th Bit Enable
PE
Note:
The burst counter wraps to initial state on the 5th clock.
Note:
The burst counter wraps to initial state on the 5th clock.
Linear Burst Sequence
A[1:0] A[1:0] A[1:0] A[1:0]
1st address
00
01
10
11
2nd address
01
10
11
00
3rd address
10
11
00
01
4th address
11
00
01
10
Interleaved Burst Sequence
A[1:0] A[1:0] A[1:0] A[1:0]
1st address
00
01
10
11
2nd address
01
00
11
10
3rd address
10
11
00
01
4th address
11
10
01
00
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| GS882V18BD-200 | 512K x 18, 256K x 36 9Mb SCD/DCD Sync Burst SRAMs |
| GS882V18BD-200I | 512K x 18, 256K x 36 9Mb SCD/DCD Sync Burst SRAMs |
| GS882V18BD-250 | 512K x 18, 256K x 36 9Mb SCD/DCD Sync Burst SRAMs |
| GS882V18BD-250I | 512K x 18, 256K x 36 9Mb SCD/DCD Sync Burst SRAMs |
| GS882V18BD-300 | 512K x 18, 256K x 36 9Mb SCD/DCD Sync Burst SRAMs |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| GS882V18BD-150 | 制造商:GSI Technology 功能描述:SRAM SYNC DUAL 1.8V 9MBIT 512KX18 7.5NS/3.8NS 165FBGA - Trays |
| GS882V18BD-200 | 制造商:GSI Technology 功能描述:SRAM SYNC DUAL 1.8V 9MBIT 512KX18 6.5NS/3NS 165FBGA - Trays |
| GS882V18BD-250 | 制造商:GSI Technology 功能描述:SRAM SYNC DUAL 1.8V 9MBIT 512KX18 5.5NS/2.5NS 165FBGA - Trays |
| GS882V18BD-250I | 制造商:GSI Technology 功能描述:SRAM SYNC DUAL 1.8V 9MBIT 512KX18 5.5NS/2.5NS 165FBGA - Trays |
| GS882V18BGB-200 | 制造商:GSI Technology 功能描述:SRAM SYNC DUAL 1.8V 9MBIT 512KX18 6.5NS/3NS 119FBGA - Trays |
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