參數(shù)資料
型號: GS881Z36AT-225
廠商: GSI TECHNOLOGY
元件分類: DRAM
英文描述: 9Mb Pipelined and Flow Through Synchronous NBT SRAM
中文描述: 256K X 36 ZBT SRAM, 6 ns, PQFP100
封裝: TQFP-100
文件頁數(shù): 4/31頁
文件大?。?/td> 508K
代理商: GS881Z36AT-225
GS881Z18/36AT-250/225/200/166/150/133
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
Rev: 1.03 11/2004
4/31
2001, GSI Technology
100-Pin TQFP Pin Descriptions
Symbol
A
0
, A
1
A
n
CK
B
A
B
B
B
C
B
D
W
E
1
E
2
E
3
G
ADV
CKE
NC
DQ
A
DQ
B
DQ
C
DQ
D
ZZ
FT
LBO
V
DD
V
SS
V
DDQ
Type
In
In
In
In
In
In
In
In
In
In
In
In
In
In
I/O
I/O
I/O
I/O
In
In
In
Description
Burst Address Inputs; Preload the burst counter
Address Inputs
Clock Input Signal
Byte Write signal for data inputs DQ
A1
–DQ
A9
; active low
Byte Write signal for data inputs DQ
B1
–DQ
B9
; active low
Byte Write signal for data inputs DQ
C1
–DQ
C9
; active low
Byte Write signal for data inputs DQ
D1
–DQ
D9
; active low
Write Enable; active low
Chip Enable; active low
Chip Enable—Active High. For self decoded depth expansion
Chip Enable—Active Low. For self decoded depth expansion
Output Enable; active low
Advance/Load; Burst address counter control pin
Clock Input Buffer Enable; active low
No Connect
Byte A Data Input and Output pins
Byte B Data Input and Output pins
Byte C Data Input and Output pins
Byte D Data Input and Output pins
Power down control; active high
Pipeline/Flow Through Mode Control; active low
Linear Burst Order; active low.
In
Core power supply
In
Ground
In
Output driver power supply
相關PDF資料
PDF描述
GS881Z36AT-225I 9Mb Pipelined and Flow Through Synchronous NBT SRAM
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GS882V18BGB-200I 512K x 18, 256K x 36 9Mb SCD/DCD Sync Burst SRAMs
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