- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄383052 > GS8644Z36E-166I (Electronic Theatre Controls, Inc.) Header; No. of Contacts:10; Pitch Spacing:0.079"; No. of Rows:2; Gender:Male; Series:1552; Body Material:Glass Filled Polyester; Connector Retention Style:Latch/Ejector; Contact Termination:Through Hole; Housing Style:Right-Angle RoHS Compliant: Yes PDF資料下載
參數(shù)資料
| 型號： | GS8644Z36E-166I |
| 廠商： | Electronic Theatre Controls, Inc. |
| 英文描述： | Header; No. of Contacts:10; Pitch Spacing:0.079"; No. of Rows:2; Gender:Male; Series:1552; Body Material:Glass Filled Polyester; Connector Retention Style:Latch/Ejector; Contact Termination:Through Hole; Housing Style:Right-Angle RoHS Compliant: Yes |
| 中文描述： | 72Mb流水線和流量，通過同步唑的SRAM |
| 文件頁數(shù)： | 31/39頁 |
| 文件大?。?/td> | 1174K |
| 代理商： | GS8644Z36E-166I |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁當(dāng)前第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁
Product Preview
GS8644Z18(B/E)/GS8644Z36(B/E)/GS8644Z72(C)
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
Rev: 1.03 11/2004
31/39
2003, GSI Technology
JTAG Port AC Test Conditions
JTAG TAP Instruction Set Summary
Instruction
Code
Description
Notes
EXTEST
000
Places the Boundary Scan Register between TDI and TDO.
1
IDCODE
001
Preloads ID Register and places it between TDI and TDO.
1, 2
SAMPLE-Z
010
Captures I/O ring contents. Places the Boundary Scan Register between TDI and
TDO.
Forces all RAM output drivers to High-Z.
1
RFU
011
Do not use this instruction; Reserved for Future Use.
Replicates BYPASS instruction. Places Bypass Register between TDI and TDO.
1
SAMPLE/
PRELOAD
100
Captures I/O ring contents. Places the Boundary Scan Register between TDI and
TDO.
1
GSI
101
GSI private instruction.
1
RFU
110
Do not use this instruction; Reserved for Future Use.
Replicates BYPASS instruction. Places Bypass Register between TDI and TDO.
1
BYPASS
111
Places Bypass Register between TDI and TDO.
1
Notes:
1.
2.
Instruction codes expressed in binary, MSB on left, LSB on right.
Default instruction automatically loaded at power-up and in test-logic-reset state.
Notes:
1.
2.
Include scope and jig capacitance.
Test conditions as as shown unless otherwise noted.
Parameter
Conditions
Input high level
V
DD
– 0.2 V
Input low level
0.2 V
Input slew rate
1 V/ns
Input reference level
V
DDQ
/2
Output reference level
V
DDQ
/2
DQ
V
DDQ
/2
50
30pF
*
JTAG Port AC Test Load
* Distributed Test Jig Capacitance
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| GS88018AT-133 | 512K x 18, 256K x 32, 256K x 36 9Mb Sync Burst SRAMs |
| GS88018AT-133I | 512K x 18, 256K x 32, 256K x 36 9Mb Sync Burst SRAMs |
| GS88018AT-150 | 512K x 18, 256K x 32, 256K x 36 9Mb Sync Burst SRAMs |
| GS88018AT-150I | 512K x 18, 256K x 32, 256K x 36 9Mb Sync Burst SRAMs |
| GS88018AT-166 | 512K x 18, 256K x 32, 256K x 36 9Mb Sync Burst SRAMs |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| GS8644Z36E-166IV | 制造商:GSI Technology 功能描述:SRAM SYNC SGL 1.8V/2.5V 72MBIT 2MX36 7NS/2.9NS 165FPBGA - Trays |
| GS8644Z36E-166V | 制造商:GSI 制造商全稱:GSI Technology 功能描述:72Mb Pipelined and Flow Through Synchronous NBT SRAM |
| GS8644Z36E-200 | 制造商:GSI 制造商全稱:GSI Technology 功能描述:72Mb Pipelined and Flow Through Synchronous NBT SRAM |
| GS8644Z36E-200I | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:72Mb Pipelined and Flow Through Synchronous NBT SRAM |
| GS8644Z36E-200IV | 制造商:GSI 制造商全稱:GSI Technology 功能描述:72Mb Pipelined and Flow Through Synchronous NBT SRAM |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。