參數(shù)資料
型號(hào)： GS842Z18CB-250T
廠商： GSI TECHNOLOGY
元件分類： SRAM
英文描述： 256K X 18 ZBT SRAM, 5.5 ns, PBGA119
封裝： FPBGA-119
文件頁(yè)數(shù)： 5/29頁(yè)
文件大?。?/td> 248K
代理商： GS842Z18CB-250T
GS842Z18CB/GS842Z36CB
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
Rev: 1.01 8/2011
13/29
2011, GSI Technology
VDD2 Range Logic Levels
Parameter
Symbol
Min.
Typ.
Max.
Unit
Input High Voltage
VIH
0.6*VDD
—
VDD + 0.3
V
Input Low Voltage
VIL
–
0.3
—
0.3*VDD
V
Note:
VIHQ (max) is voltage on VDDQ pins plus 0.3 V.
Operating Temperature
Parameter
Symbol
Min.
Typ.
Max.
Unit
Junction Temperature
(Commercial Range Versions)
TJ
025
85
C
Junction Temperature
(Industrial Range Versions)*
TJ
–40
25
100
C
Note:
* The part numbers of Industrial Temperature Range versions end with the character “I”. Unless otherwise noted, all performance specifications
quoted are evaluated for worst case in the temperature range marked on the device.
Thermal Impedance
Package
Test PCB
Substrate
JA (C°/W)
Airflow = 0 m/s
JA (C°/W)
Airflow = 1 m/s
JA (C°/W)
Airflow = 2 m/s
JB (C°/W)
JC (C°/W)
100 TQFP
4-layer
28.3
27.2
25.4
—
7.1
Notes:
1. Thermal Impedance data is based on a number of samples from mulitple lots and should be viewed as a typical number.
2. Please refer to JEDEC standard JESD51-6.
3. The characteristics of the test fixture PCB influence reported thermal characteristics of the device. Be advised that a good thermal path to
the PCB can result in cooling or heating of the RAM depending on PCB temperature.
20% tKC
VSS – 2.0 V
50%
VSS
VIH
Undershoot Measurement and Timing
Overshoot Measurement and Timing
20% tKC
VDD + 2.0 V
50%
VDD
VIL
Note:
Input Under/overshoot voltage must be –2 V > Vi < VDDn+2 V not to exceed 4.6 V maximum, with a pulse width not to exceed 20% tKC.
相關(guān)PDF資料
PDF描述
GS8641ZV18GE-200 4M X 18 ZBT SRAM, 7.5 ns, PBGA165
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GS8662QT10BD-200I 8M X 9 QDR SRAM, 0.45 ns, PBGA165
GS8662QT10BGD-250T 8M X 9 QDR SRAM, 0.45 ns, PBGA165
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