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參數(shù)資料
| 型號： | GS832032AGT-200 |
| 廠商： | GSI TECHNOLOGY |
| 元件分類： | SRAM |
| 英文描述： | CACHE SRAM, PQFP100 |
| 封裝： | ROHS COMPLIANT, TQFP-100 |
| 文件頁數(shù)： | 3/23頁 |
| 文件大?。?/td> | 583K |
| 代理商： | GS832032AGT-200 |
First Write
First Read
Burst Write
Burst Read
Deselect
R
W
CR
CW
X
WR
R
W
R
X
CR
R
CW
CR
W
CW
W
CW
Notes:
1. The diagram shows supported (tested) synchronous state transitions plus supported transitions that depend upon the use of G.
2. Use of “Dummy Reads” (Read Cycles with G High) may be used to make the transition from Read cycles to Write cycles without passing
through a Deselect cycle. Dummy Read cycles increment the address counter just like normal read cycles.
3. Transitions shown in gray tone assume G has been pulsed high long enough to turn the RAM’s drivers off and for incoming data to meet
Data Input Set Up Time.
GS832018/32/36AGT-400/375/333/250/200/150
Preliminary
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
Rev: 1.00a 2/2011
11/23
2011, GSI Technology
Simplified State Diagram with G
相關PDF資料 |
PDF描述 |
|---|---|
| GS8320V32GT-166IT | 1M X 32 CACHE SRAM, 8 ns, PQFP100 |
| GS832236B-225 | 1M X 36 CACHE SRAM, 7 ns, PBGA119 |
| GS832236E-225IV | 1M X 36 CACHE SRAM, 7 ns, PBGA165 |
| GS8322Z18E-225VT | 2M X 18 ZBT SRAM, 7 ns, PBGA165 |
| GS8322ZV72GC-150IT | 512K X 72 ZBT SRAM, 8.5 ns, PBGA209 |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| GS832032AGT-250 | 制造商:GSI Technology 功能描述:100 TQFP - Bulk |
| GS832032AGT-250I | 制造商:GSI Technology 功能描述:100 TQFP - Bulk |
| GS832032AGT-250IV | 制造商:GSI Technology 功能描述:100 TQFP - Bulk |
| GS832032AGT-250V | 制造商:GSI Technology 功能描述:100 TQFP - Bulk |
| GS832032AGT-333 | 制造商:GSI Technology 功能描述:100 TQFP - Bulk |
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