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參數(shù)資料
| 型號： | GS820H32A |
| 廠商： | GSI TECHNOLOGY |
| 英文描述： | 2Mb（64K x 32Bit) Synchronous Burst SRAM(2M位（64K x 32位）同步靜態(tài)RAM（帶2位脈沖地址計數(shù)器）) |
| 中文描述： | 2MB的（64K的x 32位）同步突發(fā)靜態(tài)存儲器（200萬位（64K的× 32位）同步靜態(tài)隨機存儲器（帶2位脈沖地址計數(shù)器）） |
| 文件頁數(shù)： | 3/23頁 |
| 文件大?。?/td> | 341K |
| 代理商： | GS820H32A |
Rev: 1.04 3/2000
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com
3/23
2000, Giga Semconductor, Inc.
E
GS820H32AT/Q-150/138/133/117/100/66
TQFP Pin Description
H
Pin Location
37, 36
Symbol
A
0
, A
1
Type
I
Description
Address field LSB’s and Address Counter preset Inputs
35, 34, 33, 32, 100, 99, 82, 81, 44, 45,
46, 47, 48, 49
52, 53, 56, 57, 58, 59, 62, 63
68, 69, 72, 73, 74, 75, 78, 79
2, 3, 6, 7, 8, 9, 12, 13
18, 19, 22, 23, 24, 25, 28, 29
16, 38, 39, 42, 43, 66, 50, 51, 80, 1, 30
87
93, 94
95, 96
89
88
98, 92
97
86
83
84, 85
64
14
31
15, 41, 65, 91
5,10,17, 21, 26, 40, 55, 60, 67, 71, 76, 90
4, 11, 20, 27, 54, 61, 70, 77
A
2
-
15
I
Address Inputs
DQ
A1
-DQ
A8
DQ
B1
-DQ
B8
DQ
C1
-DQ
C8
DQ
D1
-DQ
D8
NC
BW
B
A
, B
B
B
C
, B
D
CK
GW
E
1
, E
3
E
2
G
ADV
ADSP, ADSC
ZZ
FT
LBO
V
DD
V
SS
V
DDQ
I/O
Data Input and Output pins.
No Connect
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
Byte Write. Writes all enabled bytes. Active Low.
Byte Write Enable for DQ
A
, DQ
B
Data I/O’s. Active Low.
Byte Write Enable for DQ
C
, DQ
D
Data I/O’s. Active Low.
Clock Input Signal. Active High.
Global Write Enable. Writes all bytes. Active Low.
Chip Enable. Active Low.
Chip Enable. Active High.
Output Enable. Active Low.
Burst address counter advance enable. Active Low.
Address Strobe (Processor, Cache Controller). Active Low.
Sleep Mode control. Active High.
Flow Through or Pipeline mode. Active Low.
Linear Burst Order mode. Active Low.
Core power supply.
I/O and Core Ground.
Output driver power supply.
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