參數(shù)資料
型號: GS8161Z18T-250T
廠商: Electronic Theatre Controls, Inc.
英文描述: 22-Bit Voltage Clamp 48-SSOP -40 to 85
中文描述: 35.7流水線和流量,通過同步唑的SRAM
文件頁數(shù): 30/36頁
文件大?。?/td> 939K
代理商: GS8161Z18T-250T
GS8161Z18(T/D)/GS8161Z32(D)/GS8161Z36(T/D)
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
Rev: 2.15 11/2004
30/36
1998, GSI Technology
JTAG Port Timing Diagram
Boundary Scan (BSDL Files)
For information regarding the Boundary Scan Chain, or to obtain BSDL files for this part, please contact our Applications
Engineering Department at: apps@gsitechnology.com.
JTAG Port AC Electrical Characteristics
Parameter
TCK Cycle Time
TCK Low to TDO Valid
TCK High Pulse Width
TCK Low Pulse Width
TDI & TMS Set Up Time
TDI & TMS Hold Time
Symbol
tTKC
tTKQ
tTKH
tTKL
tTS
tTH
Min
50
20
20
10
10
Max
20
Unit
ns
ns
ns
ns
ns
ns
tTH
tTS
tTKQ
tTH
tTS
tTH
tTS
tTKL
tTKH
tTKC
TCK
TDI
TMS
TDO
Parallel SRAM input
相關(guān)PDF資料
PDF描述
GS8161Z32D-225I 22-Bit Voltage Clamp 48-SSOP -40 to 85
GS8161Z32T-250IT 512 x 18 Synchronous FIFO Memory 64-TQFP 0 to 70
GS8161Z32T-250T 512 x 18 Synchronous FIFO Memory 64-TQFP 0 to 70
GS8161Z36D-200T 512 x 18 Synchronous FIFO Memory 64-TQFP 0 to 70
GS8161Z36D-225 1024 x 18 Synchronous FIFO Memory 64-TQFP 0 to 70
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