參數(shù)資料
型號: GS8161Z18B
廠商: GSI TECHNOLOGY
英文描述: 18Mb Pipelined and Flow Through Synchronous NBT SRAM
中文描述: 35.7流水線和流量,通過同步唑的SRAM
文件頁數(shù): 13/37頁
文件大小: 618K
代理商: GS8161Z18B
GS8161Z18B(T/D)/GS8161Z32B(D)/GS8161Z36B(T/D)
Preliminary
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
Rev: 1.00 9/2004
13/37
2004, GSI Technology
Pipelined and Flow Through Read Write Control State Diagram
Deselect
New Read
New Write
Burst Read
Burst Write
W
R
B
R
B
W
D
D
B
B
W
R
D
B
W
R
D
D
Current State (n)
Next State (n+1)
Transition
Input Command Code
Key
Notes:
1. The Hold command (CKE Low) is not
shown because it prevents any state change.
2. W, R, B, and D represent input command
codes as indicated in the Synchronous Truth Table.
Clock (CK)
Command
Current State
Next State
n
n+1
n+2
n+3
Current State and Next State Definition for
Pipelined and Flow Through Read/Write Control State Diagram
W
R
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