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參數(shù)資料
| 型號： | GS8161V36CGD-333I |
| 廠商： | GSI TECHNOLOGY |
| 元件分類： | DRAM |
| 英文描述： | 1M x 18 and 512K x 36 18Mb Sync Burst SRAMs |
| 中文描述： | 512K X 36 CACHE SRAM, 4.5 ns, PBGA165 |
| 封裝： | 13 X 15 MM, 1 MM PITCH, LEAD FREE, FBGA-165 |
| 文件頁數(shù)： | 12/28頁 |
| 文件大小： | 584K |
| 代理商： | GS8161V36CGD-333I |
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GS8161V18/36CD-333/300/250
Preliminary
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
Rev: 1.01 2/2005
12/28
2004, GSI Technology
Capacitance
(T
A
= 25
o
C, f = 1 MH
Z
, V
DD
= 2.5 V)
Note:
These parameters are sample tested.
Logic Levels
Parameter
Symbol
Min.
Typ.
Max.
Unit
Notes
V
DD
Input High Voltage
V
IH
0.6*V
DD
—
V
DD
+ 0.3
V
1
V
DD
Input Low Voltage
V
IL
–
0.3
—
0.3*V
DD
V
1
V
DDQ
I/O Input High Voltage
V
IHQ
0.6*V
DD
—
V
DDQ
+ 0.3
V
1,3
V
DDQ
I/O Input Low Voltage
V
ILQ
–
0.3
—
0.3*V
DD
V
1,3
Notes:
1.
The part numbers of Industrial Temperature Range versions end the character “I”. Unless otherwise noted, all performance specifica-
tions quoted are evaluated for worst case in the temperature range marked on the device.
Input Under/overshoot voltage must be
–
2 V > Vi < V
DDn
+2 V not to exceed 3.6 V maximum, with a pulse width not to exceed 20% tKC.
V
IHQ
(max) is voltage on V
DDQ
pins plus 0.3 V.
2.
3.
Parameter
Symbol
C
IN
C
I/O
Test conditions
V
IN
= 0 V
V
OUT
= 0 V
Typ.
Max.
Unit
Input Capacitance
4
5
pF
Input/Output Capacitance
6
7
pF
20% tKC
V
SS
–
2.0 V
50%
V
SS
V
IH
Undershoot Measurement and Timing
Overshoot Measurement and Timing
20% tKC
V
DD
+ 2.0 V
50%
V
DD
V
IL
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