參數(shù)資料
型號: GS8160E36
廠商: GSI TECHNOLOGY
英文描述: 16Mb(256K x 72Bit)Sync Burst SRAM(16M位(256K x 72位)同步靜態(tài)RAM(帶2位脈沖地址計數(shù)器))
中文描述: 16Mb的(256 × 72Bit)同步突發(fā)靜態(tài)存儲器(1,600位(256 × 72位)同步靜態(tài)隨機(jī)存儲器(帶2位脈沖地址計數(shù)器))
文件頁數(shù): 22/26頁
文件大?。?/td> 519K
代理商: GS8160E36
Rev: 2.07 11/2000
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
22/26
1999, Giga Semiconductor, Inc.
Preliminary
GS8160E18/32/36T-225/200/180/166/150/133
Sleep Mode Timing Diagram
Application Tips
Single and Dual Cycle Deselect
SCD devices force the use of “dummy read cycles” (read cycles that are launched normally, but that are ended with the output
drivers inactive) in a fully synchronous environment. Dummy read cycles waste performance, but their use usually assures there
will be no bus contention in transitions from reads to writes or between banks of RAMs. DCD SRAMs do not waste bandwidth on
dummy cycles and are logically simpler to manage in a multiple bank application (wait states need not be inserted at bank address
boundary crossings), but greater care must be exercised to avoid excessive bus contention.
CK
ADSP
ADSC
tH
tKH tKL
tKC
tS
ZZ
tZZR
tZZH
tZZS
~
~
~
~
Snooze
相關(guān)PDF資料
PDF描述
GS8160F18 16Mb(1M x 18Bit)Sync Burst SRAM(16M位(1M x 18位)同步靜態(tài)RAM(帶2位脈沖地址計數(shù)器))
GS8160F32 16Mb(512K x 36Bit)Sync Burst SRAM(16M位(512K x 36位)同步靜態(tài)RAM(帶2位脈沖地址計數(shù)器))
GS8160F36 16Mb(256K x 72Bit)Sync Burst SRAM(16M位(256K x 72位)同步靜態(tài)RAM(帶2位脈沖地址計數(shù)器))
GS8160Z18 18Mb Pipelined and Flow Through Synchronous NBT SRAM
GS8160Z18T-133 18Mb Pipelined and Flow Through Synchronous NBT SRAM
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
GS8160E36BGT-150 制造商:GSI Technology 功能描述:SRAM SYNC QUAD 2.5V/3.3V 18MBIT 512KX36 7.5NS/3.8NS 100TQFP - Trays
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GS8160E36BGT-150IV 制造商:GSI Technology 功能描述:SRAM SYNC QUAD 1.8V/2.5V 18MBIT 512KX36 7.5NS/3.8NS 100TQFP - Trays
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GS8160E36BGT-200 制造商:GSI Technology 功能描述:SRAM SYNC SGL 2.5V/3.3V 18MBIT 512KX36 6.5NS/3NS 100TQFP - Trays