- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄67672 > GP2021 (Mitel Networks Corporation) GPS 12 channel Correlator(用于全球定位系統(tǒng)（GPS）接收器的12通道的C/A代碼基帶相關(guān)器) PDF資料下載
參數(shù)資料
| 型號： | GP2021 |
| 廠商： | Mitel Networks Corporation |
| 英文描述： | GPS 12 channel Correlator(用于全球定位系統(tǒng)（GPS）接收器的12通道的C/A代碼基帶相關(guān)器) |
| 中文描述： | 全球定位系統(tǒng)12通道相關(guān)器（用于全球定位系統(tǒng)（GPS）的接收器的12通道的C / A電代碼基帶相關(guān)器） |
| 文件頁數(shù)： | 17/62頁 |
| 文件大?。?/td> | 371K |
| 代理商： | GP2021 |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁當(dāng)前第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁
24
GP2021
This Integrated Carrier Phase may be related to the
delta–range, (the change in distance to each satellite). When
used with the orbital parameters of the satellites, the delta–
ranges give a measure of the receiver’s movement between
fixes, which is independent of those fixes and so can be used
to smooth them. It can also give a velocity directly. The delta–
ranges will be noisy and most of the value is due to satellite
movement so the determination of velocity must use data from
adequately separated TICs. For position smoothing all delta–
ranges may be included in the input to the navigation filter, as
that filter will perform a running average of the delta–ranges as
well as the ranges.
Timemark Generation
The GP2021 is capable of generating an accurate
TIMEMARK timing output on one of the discrete outputs if
required. TIMEMARK is intended to be a UTC aligned timing
output with an accurate 1 second period and a pulse width of
1ms. The TIMEMARK output is always derived from a rising
edge on TIC, and for UTC aligned operation the TIC counter
must be brought into phase with UTC. This is done by
modifying the division ratio of the TIC counter for a single TIC
period, by increasing or reducing the division ratio, thus
slewing the phase of TIC. Since the TIC counter is
incremented every 175ns which is not an exact sub–multiple
of 1 second it is also necessary to continually monitor the
relationship between TIC and UTC to keep TIC in phase with
UTC. Once TIC is in phase with UTC, the TIMEMARK output
can be derived from TIC using one of 2 methods both of which
involves writing to TIMEMARK_CONTROL: (1) The GP2021
can be armed to produce a TIMEMARK output at the next TIC
only, or (2) It can be programmed to give a TIMEMARK output
every n TICs starting at the next TIC.
A separate counter resets the TIMEMARK output giving
a 1ms pulse width. The TIC counter can be programmed with
an accuracy of 175ns in Real_Input mode or 171.4ns in
Complex_Input mode. This determines the accuracy of the
TIMEMARK output. If the TIC is continually synchronised to
keep the rising edge as close as possible to UTC, the internal
TIMEMARK will be within 100ns (4/7 x 175ns) of UTC in
Real_Input mode or 85.7ns (3/6 x 171.4ns) of UTC in
Complex_Input mode. In addition, there may be a delay of up
to 50ns in getting the TIMEMARK output off chip, giving a
maximum error of 150ns (Real_Input) or 135.7ns
(Complex_Input) between TIMEMARK and UTC. It should be
noted that due to the need to re–synchronise TIC, a jitter of up
to 175ns may be present on TIMEMARK, along with any jitter
and drift present on the input clock. The pulse width of
TIMEMARK (in seconds) is either (5714 + 2/7) * (7/ Master
Clock Frequency) for Real_Input mode giving 1.0000000ms
(assuming an accurate 40MHz master clock input) or (5833 +
1/6) * (6 / Master Clock Frequency) for Complex_Input mode
giving 0.9999714ms (assuming an accurate 35MHz master
clock input).
PH
KK
Cycles
TIC
11
1
0
22
2
Y2
Y1
1. reading at TIC0 :
CHx_CARR_DCO_PHASE0 = PH0
2. reading at TIC1 :
CHx_CARR_DCO_PHASE1 = PH1
CHx_CARR_CYCLE1 = K1 + 1
3. reading at TIC2 :
CHx_CARR_DCO_PHASE2 = PH2
CHx_CARR_CYCLE2 = K2 + 1
Y1
= 2
π * K1 + (2π – PH0) + PH1
= 2
π(K1 + 1) – PH0 + PH1
= 2
π * (CHx_CARR_CYCLE1 – CHx_CARR_DCO_PHASE0 /1024 + CHx_CARR_DCO_PHASE1/1024)
∑
Y = 2
π *(
last
i1
CHx_CARR_CYCLE
i
CHx_CARR_DCO_PHASE
0 1024
CHx_CARR_DCO_PHASE
last 1024)
Note: The Carrier Cycle Counter value is stored at every TIC and the Counter is reset
Fig.22 Integrated carrier phase
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| GP2021 | GPS 12 channel Correlator Advance Information |
| GRM40Y5V105Z16 | Circular Connector; MIL SPEC:MIL-C-26482, Series I, Solder; Body Material:Aluminum; Series:PT06; No. of Contacts:21; Connector Shell Size:22; Connecting Termination:Solder; Circular Shell Style:Straight Plug; Body Style:Straight |
| GRM42-6X5R475K10 | 50/100M SOT-23 CMOS RF LDO REGULATORS |
| GT- 32090 | Highly Integrated Single-Chip System Controller(高集成單片系統(tǒng)控制器) |
| GT-48001A | Switched Ethernet Controller For 10BaseX(10BaseX交換式快速以太網(wǎng)控制器) |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| GP2021IGGQ1R | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Correlator |
| GP202K | 制造商:GTM 制造商全稱:GTM 功能描述:SURFACE MOUNT,SWITCHING DIODE |
| GP2030S | 制造商:GTM 制造商全稱:GTM 功能描述:N AND P-CHANNEL ENHANCEMENT MODE POWER MOSFET |
| GP2-031X250-50 | 制造商:GROOV-PIN 功能描述: |
| GP204 | 制造商:DEC 制造商全稱:DEC 功能描述:2 AMP SOFT GLASS PASSIVATED DIODES |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。