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參數(shù)資料
| 型號： | GMS97L2051 |
| 元件分類： | 微控制器 |
| 英文描述： | REMOTE CONTROLLER |
| 中文描述： | 遙控器 |
| 文件頁數(shù)： | 26/39頁 |
| 文件大?。?/td> | 254K |
| 代理商： | GMS97L2051 |
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GMS97C1051/L1051
8-Bit CMOS Microcontroller
HYUNDAI MicroElectronics
26
Table 3
. SFR lists and their addresses
Symbol
Name
Address
* ACC
* B
DPH
DPL
* PSW
SP
Accumulator
B Register
Data Pointer High Byte
Data Pointer Low Byte
Program Status Word
Stack Pointer
E0
H
F0
H
83
H
82
H
D0
H
81
H
* IE
* IP
Interrupt Enable Control
Interrupt Priority Control
A8
H
B8
H
* P1
* P3
Port 1
Port 3
90
H
B0
H
* TCON
TH0
TL0
* TMOD
Timer/Counter Control
Timer/Counter 0 High Bytes
Timer/Counter 0 Low Bytes
Timer/Counter Mode Control
88
H
8C
H
8A
H
89
H
*
= Bit addressable SFR
Timer/Counter 0
The GMS97C1051/L1051 has one 16-bit Timer/
Counter register : Timer0 . As a Timer, the register
is incremented every machine cycle. Thus, the
register counts machine cycle. Since a machine
cycle consists of 12 oscillator periods, the count
rate is 1/12 of the oscillator frequency. As a
counter, the register is incremented in response to a
1-to-0 transition at its corresponding external input
pin P3.4/T0. Since 2 machine cycles are required to
recognize a 1-to-0 transition, the maximum count
rate is 1/24 of the oscillator frequency. External
inputs P3.2/INT0 and 3.3/INT1 can be programmed
to function as a gate to facilitate pulse width meas-
urements. Timer/Counter 0 can be used in four
operating modes as listed in
Table 4
.
Figure 3
illustrates the input clock logic.
Table 4
. Timer / Counter 0 Operating Modes
Mode
Description
TMOD
Gate
C/T
M1
M0
0
8-bit Timer/Counter with 5-bit prescaler
×
×
0
0
1
16-bit timer/counter
×
×
0
1
2
8-bit Auto-Reload Timer/Counter
×
×
1
0
3
(Timer 0) TL0 is an 8-bit Timer/Counter controlled by
the standard Timer 0 control bits, TH0 is an 8-bit Timer
×
×
1
1
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