參數(shù)資料
型號(hào)： GMS97C52H
廠商： HYNIX SEMICONDUCTOR INC
元件分類： 微控制器/微處理器
英文描述： 8-BIT SINGLE-CHIP MICROCONTROLLERS
中文描述： 8-BIT, OTPROM, 33 MHz, MICROCONTROLLER, PDIP40
封裝： PLASTIC, DIP-40
文件頁(yè)數(shù)： 8/39頁(yè)
文件大?。?/td> 254K
代理商： GMS97C52H
GMS97C2051/L2051
8-Bit CMOS Microcontroller
HYUNDAI MicroElectronics
8
Table 6
. Formulas for calculating Baud rates
Baud Rate
generated from
Serial Port Mode
Baud Rate
Oscillator
0
2
fosc / 12
(2
x fosc) / 64
Timer1
(Timer1 Mode2)
1 , 3
1 , 3
(2
SMOD
x Timer1 overflow rate) / 32
(2
SMOD
x fosc) / [32 x 12 x (256-TH1)]
Interrupt System
The GMS97C2051/L2051 provides 5 interrupt
sources ( two external interrupts, two timer inter-
rupts and serial port interrupt ) with two priority
levels.
Figure 4
gives a general overview of the
interrupt sources and illustrates the request and
control flags.
A low-priority interrupt can itself be interrupted by
a high-priority interrupt, but not by another low
priority interrupt. A high-priority interrupt cannot
be interrupted by any other interrupt source.
If two requests of different priority levels are re-
ceived simultaneously, the request of higher
priority is serviced. If requests of the same prior-
ity level are received simultaneously, an internal
polling sequence determines which request is serv-
iced. Thus within each priority level there is a
second priority structure determined by the polling
sequence like
Table 8
.
Figure 4
. Interrupt Request Sources
Timer 1 Overflow
ET1
IE.3
PT1
IP.3
TF1
TCON.7
IT0
TCON.0
TCON.1
IE0
EX0
IE.0
PX0
IP.0
P3.2/
INT0
EA
IE.7
IT1
TCON.2
TCON.3
IE1
EX1
IE.2
PX1
IP.2
P3.3/
INT1
TF0
TCON.5
Timer 0 Overflow
ET0
IE.1
PT0
IP.1
1
R1
SCON.0
USART
SCON.1
T1
ES
IE.4
PS
IP.4
High Priority
Low Priority
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