參數(shù)資料
型號(hào): GMS97C52
英文描述: 8-Bit CMOS Microcontrollers(高性價(jià)比的51單片機(jī),片內(nèi)8KEPROM,256字節(jié)RAM,工作電壓5V)
中文描述: 8位CMOS微控制器(高性價(jià)比的51單片機(jī),片內(nèi)8KEPROM,256字節(jié)的RAM,工作電壓5V的)
文件頁(yè)數(shù): 23/59頁(yè)
文件大?。?/td> 812K
代理商: GMS97C52
Table 8
Interrupt Sources and their Corresponding Interrupt Vectors
Source (Request Flags)
Vector
Vector Address
RESET
IE0
TF0
IE1
TF1
RI + TI
TF2 + EXF2
RESET
External interrupt 0
Timer 0 interrupt
External interrupt 1
Timer 1 interrupt
Serial port interrupt
Timer 2 interrupt
0000
H
0003
H
000B
H
0013
H
001B
H
0023
H
002BH
A low-priority interrupt can itself be interrupted by a high-priority interrupt, but not by another low priority
interrupt. A high-priority interrupt cannot be interrupted by any other interrupt source.
If two requests of different priority level are received simultaneously, the request of higher priority is
serviced. If requests of the same priority are received simultaneously, an internal polling sequence
determines which request is serviced. Thus within each priority level there is a second priority structure
determined by the polling sequence as shown in
table 9.
Table 9
Interrupt Priority-Within-Level
Interrupt Source
Priority
High
é
é
é
é
Low
External Interrupt 0
Timer 0 Interrupt
External Interrupt 1
Timer 1 Interrupt
Serial Channel
Timer 2 Interrupt
IE0
TF0
IE1
TF1
RI + TI
TF2 EXF2
8-Bit CMOS Microcontroller
GMS90 Series
MAY. 1998
23
LG Semicon MCU
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