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參數(shù)資料
| 型號： | GMS97C1051-24D |
| 廠商： | HYNIX SEMICONDUCTOR INC |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 8-Bit CMOS Microcontorller |
| 中文描述： | 8-BIT, OTPROM, 24 MHz, MICROCONTROLLER, PDSO20 |
| 封裝： | 0.300 INCH, PLASTIC, SOP-20 |
| 文件頁數(shù)： | 28/39頁 |
| 文件大小： | 254K |
| 代理商： | GMS97C1051-24D |
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GMS97C1051/L1051
8-Bit CMOS Microcontroller
HYUNDAI MicroElectronics
28
Table 5
. Interrupt Sources and their corresponding Interrupt Vectors
Interrupt
Source
Vector Address
External interrupt 0
Timer0
External Interrupt 1
System Reset
IE0
TF0
IE1
RST
0003H
000BH
0013H
0000H
Table 6
. Interrupt Priority-Within-Level
Interrupt Source
Priority
External interrupt 0
Timer0 interrupt
External Interrupt 1
IE0
TF0
IE1
Highest
Lowest
Restrictions on Certain Instructions
The GMS97C1051/L1051 is an economical and cost-
effective member of HYUNDAI MicroElectronics
growing family of microcontrollers. It contains
1Kbytes of EPROM program memory. It is fully
compatible with the MCS-51 architecture, and can be
programmed using the MCS-51 instruction set. How-
ever, there are a few considerations one must keep in
mind when utilizing certain instructions to program this
device.
1. Branching instructions:
LCALL, LJMP, ACALL, AJMP, SJMP, JMP
@A+DPTR
These unconditional branching instructions will ex-
ecute correctly as long as the programmer keeps in
mind that the destination branching address must fall
within the physical boundaries of the program memory
size
(locations
00H
GMS97C1051/L1051). Violating the physical space
limits may cause unknown program behavior.
CJNE [...], DJNZ [...], JB, JNB, JC, JNC, JBC, JZ, JNZ
With these conditional branching instructions the same
to
3FFH
for
the
rule above applies. Again, violating the memory
boundaries may cause erratic execution.
For applications involving interrupts the normal inter-
rupt service routine address locations of the 80C51
family architecture have been preserved.
2. MOVX-related instructions, Data Memory:
The GMS97C1051/L1051 contains 64 bytes of internal
data memory. Thus, in the GMS97C1051/L1051 the
stack depth is limited to 64 bytes, the amount of avail-
able RAM. External DATA memory access is not
supported in this device, nor is external PROGRAM
memory execution. Therefore, no MOVX [...] in-
structions should be included in the program.
A typical 80C51 assembler will still assemble instruc-
tions, even if they are written in violation of the restric-
tions mentioned above. It is the responsibility of the
controller user to know the physical features and limi-
tations of the device being used and adjust the instruc-
tions used correspondingly.
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| GMS97C1051-D | 制造商:HYNIX 制造商全稱:Hynix Semiconductor 功能描述:8-Bit CMOS Microcontorller |
| GMS97C1051D-I | 制造商:Hyundai 功能描述:MCS-51 Family MCUs |
| GMS97C1051-I24 | 制造商:Hyundai 功能描述:MCS-51 Family MCUs |
| GMS97C2051 | 制造商:HYNIX 制造商全稱:Hynix Semiconductor 功能描述:8-Bit CMOS Microcontorller |
| GMS97C2051/L2051 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:8-Bit CMOS Microcontorller |
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