Quick-pulse programming
The setup for microcontroller quick-pulse programming is shown in Figure 13. Note that the GMS97C5x,
97L5x is running with a 4 to 6MHz oscillator. The reason the oscillator needs to be running is that the
device is executing internal address and program data transfers. The address of the EPROM location to
be programmed is applied to ports 1 and 2, as shown in Figure 12. The code byte to be programmed into
that location is applied to port 0, RST, PSEN and pins of port 2 and 3 in Table 11 are held at the "Program
Data" levels indicated in Table 11. The ALE/PROG is pulsed low 25 times as shown Figure 13. To program
the encryption table, repeat the 25 pulses (10 pulses for 97x54/56/58) programming sequence for
addresses 0 through 1F
H
(3F
H
for 97x54/56/58), using the "Pgm Encryption Table" levels. Do not forget
that after the encryption table is programmed, verification cycles will produce only encrypted data. To
program the security bits, repeat the 25 pulses (10 pulses for 97x54/56/58) programming sequence using
the "Pgm Security Bit" levels after one security bit is programmed, further programming of the code memory
and encryption table is disabled. However, the other security bit can still be programmed. Note that the
EA/V
PP
pin must not be allowed to go above the maximum specified Vpp level for any amount of time.
Even a narrow glitch above that voltage can cause permanent damage to the device. The V
PP
source
should be well regulated and free glitches and overshoot.
Program Verification
If security bit 2 has not been programmed, the on-chip program memory can be read out for program
verification. The address of the program memory location to be read is applied to ports 1 and 2 as shown
in Figure 15. The other pins are held at the "Verify Code Data" levels indicated in Table 11. The contents
of the address location will be emitted on port 0 for this operation. If the encryption table has been
programmed, the data presented at port 0 will be the exclusive NOR of the program byte with one of the
encryption bytes. The user will have to know the encryption table contents in order to correctly decode the
verification data. The encryption table itself cannot be read out.
Program Memory Lock Bits
The two-level Program Lock system consists of 2 Lock bits and a 32-byte (64-byte for GMS97x54/56/58)
Encryption Array which are used to protect the program memory against software piracy.
Encryption Array:
Within the EPROM array are 32 bytes (64 bytes for
GMS97x54/56/58) of Encryption Array that are initially
unprogrammed (all 1s). Every time that a byte is
addressed during a verify, address lines are used to
select a byte of the Encryption array. This byte is then
exclusive-NORed (XNOR) with the code byte, creating an
Encrypted Verify byte.
The algorithm, with the array in the unprogrammed state
(all 1s), will return the code in its original, unmodified form,
It is recommended that whenever the Encryption Array is
used, at least one of the Lock Bits be programmed as
well.
Lock Bit Protection Modes
Program Lock Bits
Protection Type
LB1 LB2
1
U
U
No program lock features
2
P
U
Futher programming of the
EPROM is disabled
3
P
P
Same as mode 2, also verify
is disabled
U: unprogrammed, P: programmed
8-Bit CMOS Microcontroller
GMS90 Series
MAY. 1998
51
LG Semicon MCU