參數(shù)資料
型號： GMS81C7208
廠商： Electronic Theatre Controls, Inc.
英文描述： NET CENTER 48" W
中文描述： 8位單晶片微控制器
文件頁數(shù)： 57/93頁
文件大?。?/td> 853K
代理商： GMS81C7208
GMS81C1404/GMS81C1408
June. 2001 Ver 1.2
55
Figure 16-2 A/D Converter Registers
Figure 16-3 A/D Converter Operation Flow
A/D Converter Cautions
(1) Input range of AN0 to AN7
The input voltage of AN0 to AN7 should be within the
specification range. In particular, if a voltage above
VDD
(or AVref)
or below V
SS
is input (even if within the absolute max-
imum rating range), the conversion value for that channel can not
be indeterminate. The conversion values of the other channels
may also be affected.
(2) Noise countermeasures
In order to maintain 8-bit resolution, attention must be paid to
noise on pins AVref(or VDD)and AN0 to AN7. Since
the effect
increases in proportion to the output impedance of the an-
alog input source, it is recommended that
a capacitor be con-
nected externally as shown in Figure 16-4 in order to reduce
noise.
Figure 16-4 Analog Input Pin Connecting Capacitor
ADCM
ADDRESS : EAH
RESET VALUE : --000001
-
-
ADEN
ADS2
ADS1
ADS0
ADST
ADSF
Reserved
Analog Channel Select
A/D Status bit
0 : A/D Conversion is in process
1 : A/D Conversion is completed
A/D Start bit
1 : A/D Conversion is started
After 1 cycle, cleared to “0”
0 : Bit force to zero
000 : Channel 0 (RB0/AN0)
001 : Channel 1 (RA1/AN1)
010 : Channel 2 (RA2/AN2)
011 : Channel 3 (RA3/AN3)
100 : Channel 4 (RA4/AN4)
101 : Channel 5 (RA5/AN5)
110 : Channel 6 (RA6/AN6)
111 : Channel 7 (RA7/AN7)
A/D Enable bit
1 : A/D Conversion is enable
0 : A/D Converter module shut off
and consumes no operation current
A/D Control Register
ADCR
ADDRESS : EBH
RESET VALUE : Undefined
ADCR7
ADCR6
ADCR5
ADCR4
ADCR3
ADCR2
ADCR1
ADCR0
A/D Result Data Register
ENABLE A/D CONVERTER
A/D START (ADST = 1)
NOP
ADSF = 1
A/D INPUT CHANNEL SELECT
ANALOG REFERENCE SELECT
READ ADCR
YES
NO
AN0~AN7
100~1000pF
Analog
Input
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