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參數(shù)資料
| 型號： | GMM27316230ETG |
| 英文描述： | 16Mx72|3.3V|75/7K|x18|SDR SDRAM - Registered DIMM 128MB |
| 中文描述： | 16Mx72 | 3.3 | 75/7K | x18 | SDRAM的特別提款權(quán)-注冊128MB的內(nèi)存 |
| 文件頁數(shù)： | 5/14頁 |
| 文件大?。?/td> | 169K |
| 代理商： | GMM27316230ETG |
Rev. 1.1/Dec.99
5
GMM27333230ATG
Absolute Maximum Ratings
Notes : 1. Respect to V
SS
Symbol
Value
Unit
Note
Parameter
V
T
-0.5 to Vcc+0.5
(<= 4.6 (max))
V
1
Voltage on any pin relative to V
SS
V
CC
-0.5 to +4.6
V
1
Supply voltage relative to V
SS
I
OUT
50
mA
Short circuit output current
P
T
1.0
W
Power dissipation
Topr
0 to +70
C
Operating temperature
Tstg
-55 to +125
C
Storage temperature
Notes : 1. All voltage referred to V
SS
.
2. V
IH
(max) = 5.6V for pulse width <= 3ns
3. V
IL
(min) = -2.0V for pulse width <= 3ns
Recommended DC Operating Conditions (Ta = 0 to + 70C)
Symbol
Min
Unit
Note
V
CC
, V
CCQ
V
1
V
SS
, V
SSQ
V
Input high voltage
V
IH
V
1, 2
Input low voltage
V
IL
V
1,3
Supply voltage
Parameter
Max
3.0
3.6
0
0
2.0
Vcc + 0.3
-0.3
0.8
Registered DIMM Operation
1. All control and address signals are registered on-DIMM register and hence delayed by one cycle in
arriving at the SDRAMs. But data is not registered in the register.
2. CAS latency defines the delay from when a READ command is registered on a rising clock edge to
when the data from that READ command becomes available at the outputs. Do not confuse DIMM
CAS latency with the SDRAM CAS latency which is one clock less.
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| GMM27316230ETG-7 | x72 SDRAM Module |
| GMM27316230ETG-75 | x72 SDRAM Module |
| GMM27316230ETG-7J | x72 SDRAM Module |
| GMM27316230ETG-7K | x72 SDRAM Module |
| GMM27316230ETG-8 | x72 SDRAM Module |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| GMM27316230ETG-7 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:x72 SDRAM Module |
| GMM27316230ETG-75 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:x72 SDRAM Module |
| GMM27316230ETG-7J | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:x72 SDRAM Module |
| GMM27316230ETG-7K | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:x72 SDRAM Module |
| GMM27316230ETG-8 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:x72 SDRAM Module |
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