參數(shù)資料
型號(hào): GM72V66441ELT
英文描述: 16Mx4|3.3V|4K|75|SDR SDRAM - 64M
中文描述: 16Mx4 | 3.3 | 4K的| 75 | SDRAM的特別提款權(quán)- 64米
文件頁數(shù): 5/10頁
文件大?。?/td> 81K
代理商: GM72V66441ELT
GM72V66441ET/ELT
Rev. 1.1/Apr.01
Notes : 1. I
CC
depends on output load condition when the device is selected. I
CC (
max) is specified at the
output open condition.
2. One bank operation.
3. Addresses are changed once per one cycle.
4. Addresses are changed once per two cycles.
5. After Power down mode, CLK operating current.
6. After Power down mode, no CLK operating current.
7. After self refresh mode set, self refresh current.
8. L-Version.
9. Input signals are V
IH
or V
IL
fixed.
Capacitance
(Ta = 25 , V
CC
, V
CCQ
= 3.3 V
0.3 V)
Input leakage current
I
LI
0
Vin
V
CC
Output leakage current
I
LO
0
DQ = disable
Vout
V
CC
Output high voltage
V
OH
V
I
OH
= -2 mA
Output low voltage
V
OL
V
I
OL
=2 mA
-1
1
-1.5
1.5
-
0.4
Parameter
Symbol
Unit Test conditions
Notes
Min
Max
- 7, -75, - 8, - 7K, - 7J
2.4
-
Notes : 1. Capacitance measured with Boonton Meter or effective capacitance measuring method.
2. DQM = V
IH
to disable Dout.
3. This parameter is sampled and not 100% tested.
4. Measured with 1.4 V bias and 200mV swing at the pin under measurement.
Parameter
Input capacitance (CLK)
Input capacitance (Signals)
Output capacitance (DQ)
Symbol
C
I1
C
I2
C
O
Min.
2.5
2.5
4.0
Max.
4
5
6.5
Unit
pF
pF
pF
Notes
1, 3, 4
1, 3, 4
1, 2, 3, 4
DC Characteristics
(Ta = 0 to 70C, V
CC
, V
CCQ
= 3.3 V +/- 0.3 V, V
SS
, V
SSQ
= 0 V)
(Continued)
-5-
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