- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄383008 > GLT625608-10J3 (Electronic Theatre Controls, Inc.) Time-Delay Relay; Contacts:SPST-NO; Time Range:1 to 100 min.; Timing Function:Delay-On-Make; Contact Carry Current:1A; Relay Terminals:Quick Connect; Supply Voltage:120VAC PDF資料下載
參數(shù)資料
| 型號(hào)： | GLT625608-10J3 |
| 廠商： | Electronic Theatre Controls, Inc. |
| 英文描述： | Time-Delay Relay; Contacts:SPST-NO; Time Range:1 to 100 min.; Timing Function:Delay-On-Make; Contact Carry Current:1A; Relay Terminals:Quick Connect; Supply Voltage:120VAC |
| 中文描述： | 32K的× 8低速的CMOS靜態(tài)RAM |
| 文件頁(yè)數(shù)： | 8/13頁(yè) |
| 文件大小： | 1001K |
| 代理商： | GLT625608-10J3 |
第1頁(yè)第2頁(yè)第3頁(yè)第4頁(yè)第5頁(yè)第6頁(yè)第7頁(yè)當(dāng)前第8頁(yè)第9頁(yè)第10頁(yè)第11頁(yè)第12頁(yè)第13頁(yè)
G-LINK
GLT625608
32K x 8 SLOW SPEED CMOS STATIC RAM
Feb, 2001(Rev. 1.1)
G-Link Technology Corporation
2701 Northwestern Parkway
Santa Clara, CA 95051, U.S.A.
G-Link Technology Corporation,Taiwan
6F,No. 24-2, Industry E. RD. IV, Science Based
Industrial Park, Hsin Chu, Tawian.
- 8 -
WRITE CYCLE 2
(1,6)
Note:
1.
WE
must be high during address transitions.
2. The internal write time of the memory is defined by the overlap of
CE
active and
WE
low. All
signals must be active to initiate a write and any one signal can terminate a write by going
inactive. The data input setup and hold timing should be referenced to the second transition
edge of the signal that terminates the write.
3. T
WR
is measured from the earlier of
CE
or
WE
going high at the end of write cycle.
4. During this period, I/O pins are in the output state so that the input signals of opposite phase to
the outputs must not be applied.
5. If the
CE
low transition occurs simultaneously with the
WE
low transitions or after the
WE
transition, outputs remain in a high impedance state.
6.
OE
is continuously low (
OE
=V
IL
).
7. D
OUT
is the same phase of write data of this write cycle.
8. D
OUT
is the read data of next address.
9. If
CE
is low is high during this period, I/O pins are in the output state. Then the data input
signals of opposite phase to the outputs must not be applied to them.
10. Transition is measured
±
200mV from steady state with C
L
=5pF.
11. t
CW
is measured from
CE
going low to the end of write.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| GLT625608-10TC | 32K x 8 SLOW SPEED CMOS STATIC RAM |
| GLT625608-10TS | 32K x 8 SLOW SPEED CMOS STATIC RAM |
| GLT625608-70FB | 32K x 8 SLOW SPEED CMOS STATIC RAM |
| GLT625608-70J3 | 32K x 8 SLOW SPEED CMOS STATIC RAM |
| GLT625608-70TC | 32K x 8 SLOW SPEED CMOS STATIC RAM |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| GLT625608-10TC | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:32K x 8 SLOW SPEED CMOS STATIC RAM |
| GLT625608-10TS | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:32K x 8 SLOW SPEED CMOS STATIC RAM |
| GLT625608-70FB | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:32K x 8 SLOW SPEED CMOS STATIC RAM |
| GLT625608-70J3 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:32K x 8 SLOW SPEED CMOS STATIC RAM |
| GLT625608-70TC | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:32K x 8 SLOW SPEED CMOS STATIC RAM |
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。