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參數(shù)資料
| 型號： | GLT44016-40TC |
| 廠商： | Electronic Theatre Controls, Inc. |
| 英文描述： | 30ppm/C Drift, 3.9uA, SOT23-3, SC70-3 Voltage Reference 3-SOT-23 -40 to 125 |
| 中文描述： | 256 × 16的CMOS動態(tài)RAM的擴展數(shù)據(jù)輸出 |
| 文件頁數(shù)： | 5/17頁 |
| 文件大?。?/td> | 748K |
| 代理商： | GLT44016-40TC |
G-LINK
GLT44016
256K X 16 CMOS DYNAMIC RAM WITH EXTENDED DATA OUTPUT
Aug, 2000(Rev.3.1)
G-Link Technology Corporation
2701Northwestern Parkway
Santa Clara, CA 95051, U.S.A.
G-Link Technology Corporation,Taiwan
6F, No. 24-2, Industry E. RD. IV, Science Based
Industrial Park, Hsin Chu, Taiwan.
- 5 -
DC and Operating Characteristics (1-2)
T
A
= 0
°
C to 70
°
C, V
CC
=5V
±
10%, V
SS
=0V, unless otherwise specified.
Sym.
Parameter
Test Conditions
Access
Time
Min.
Typ
Max.
Unit Notes
I
LI
Input Leakage Current
(any input pin)
0V
≤
V
IN
≤
5.5V
(All other pins not under
test=0V)
0V
≤
V
out
≤
5.5V
Output is disabled (Hiz)
-10
+10
μ
A
I
LO
Output Leakage Current
(for High-Z State)
Operating Current,
Random READ/WRITE
-10
+10
μ
A
I
CC1
t
RC
= t
RC
(min.)
t
RAC
= 25ns
t
RAC
= 28ns
t
RAC
= 30ns
t
RAC
= 35ns
t
RAC
= 40ns
t
RAC
= 50ns
270
270
250
210
190
170
mA
1,2
I
CC2
Standby Current,(TTL)
RAS
,
UCAS
,
LCAS
at V
IH
other inputs
≥
V
SS
4
mA
I
CC3
Refresh Current,
RAS
-Only
RAS
cycling,
UCAS
,
LCAS
at V
IH
t
RC
= t
RC
(min.)
t
RAC
= 25ns
t
RAC
= 28ns
t
RAC
= 30ns
t
RAC
= 35ns
t
RAC
= 40ns
t
RAC
= 50ns
t
RAC
= 25ns
t
RAC
= 28ns
t
RAC
= 30ns
t
RAC
= 35ns
t
RAC
= 40ns
t
RAC
= 50ns
t
RAC
= 25ns
t
RAC
= 28ns
t
RAC
= 30ns
t
RAC
= 35ns
t
RAC
= 40ns
t
RAC
= 50ns
270
270
250
210
190
170
270
270
250
210
190
170
270
270
250
210
190
170
mA
2
I
CC4
Operating Current,
EDO Page Mode
RAS
at V
,
UCAS
,
LCAS
address cycling:t
PC
=t
PC
(min.)
mA
1,2
I
CC5
Refresh Current,
CAS
Before
RAS
RAS
,
UCAS
,
LCAS
address cycling:
t
RC
=t
RC
(min.)
mA
1
I
CC6
Standby Current, (CMOS)
RAS
≥
V
CC
-0.2V,
UCAS
≥
V
CC
-0.2V,
LCAS
≥
V
CC
-0.2V,
All other inputs V
SS
2
mA
V
IL
V
IH
V
OL
V
OH
Notes:
1.I
CC
is dependent on output loading when the device output is selected. Specified I
CC
(max.) is measured with the output open.
2.I
CC
is dependent upon the number of address transitions specified I
CC
(max.) is measured with a maximum of one transition per address cycle in
random Read/Write and EDO Fast Page Mode.
3.Specified V
IL
(min.) is steady state operation. During transitions V
IL
(min.) may undershoot to -1.0V for a period not to exceed 20ns. All AC
parameters are measured with V
IL
(min.)
≥
V
SS
and V
IH
(max.)
≤
V
CC
.
Input Low Voltage
Input High Voltage
Output Low Voltage
Output High Voltage
-1
2.4
+0.8
V
CC
+1
0.4
V
V
V
V
3
3
I
OL
= 4.2mA
I
OH
= -5.0mA
2.4
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| GLT44016-50J4 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:256K X 16 CMOS DYNAMIC RAM WITH EXTENDED DATA OUTPUT |
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| GLT440L16-35J4 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:256K X 16 CMOS DYNAMIC RAM WITH EXTENDED DATA OUTPUT |
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