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參數(shù)資料
| 型號(hào)： | G771 |
| 廠(chǎng)商： | Global Mixed-mode Technology Inc. |
| 元件分類(lèi)： | 溫度/濕度傳感器 |
| 英文描述： | Two Remote Temperature Sensors with SMBus Serial Interface and System Reset Circuit |
| 中文描述： | 兩個(gè)遠(yuǎn)程溫度傳感器，帶有SMBus串行接口和系統(tǒng)復(fù)位電路 |
| 文件頁(yè)數(shù)： | 5/15頁(yè) |
| 文件大?。?/td> | 268K |
| 代理商： | G771 |
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Ver: 0.2 Preliminary
Dec 11, 2001
TEL: 886-3-5788833
http://www.gmt.com.tw
13
G771
Global Mixed-mode Technology Inc.
To check for internal bus collisions, read the status
byte. If the least significant seven bits are ones, dis-
card the data and read the status byte again. The
status bits LHIGH, LLOW, RHIGH, and RLOW are
refreshed on the SMBus clock edge immediately fol-
lowing the stop condition, so there is no danger of
losing temperature-related status data as a result of
an internal bus collision. The OPEN status bit (diode
continuity fault) is only refreshed at the beginning of a
conversion, so OPEN data is lost. The ALERT inter-
rupt latch is independent of the status byte register, so
no false alerts are generated by an internal bus colli-
sion.
When auto-converting, if the THIGH and TLOW limits
are close together, it's possible for both high-temp and
low-temp status bits to be set, depending on the
amount of time between status read operations (espe-
cially when converting at the fastest rate). In these
circumstances, it's best not to rely on the status bits to
indicate reversals in long-term temperature changes
and instead use a current temperature reading to es-
tablish the trend direction.
Temperature Conversion Rate Byte
The conversion rate register (Table 7) programs the
time interval between conversions in free running
auto-convert mode. This variable rate control reduces
the supply current in portable-equipment applications.
The conversion rate byte's POR state is 02h (0.25Hz).
The G771 looks only at the 3 LSB bits of this register,
so the upper 5 bits are "don't care" bits, which should
be set to zero. The conversion rate tolerance is ±25%
at any rate setting.
Valid A/D conversion results for all channels are avail-
able one total conversion time (125ms nominal, 156ms
156ms maximum) after initiating a conversion, whether
conversion is initiated via the RUN/STOP bit, one-shot
command, or initial power-up. Changing the conver-
sion rate can also affect the delay until new results are
available. See Table 8.
Slave Addresses
The G771 appears to the SMBus as one device hav-
ing a common address for all the ADC and fan control
channels. The device address is fixed to be 7Ah for
write and 7Bh for read.
The G771 also responds to the SMBus Alert Re-
sponse slave address (see the Alert Response Ad-
dress section).
POR and UVLO
The G771 has a volatile memory. To prevent ambigu-
ous power-supply conditions from corrupting the data
in memory and causing erratic behavior, a POR volt-
age detector monitors Vcc and clears the memory if
Vcc falls below 1.7V (typical, see Electrical Charac-
teristics table). When power is first applied and Vcc
rises above 1.75V (typical), the logic blocks begin op-
erating, although reads and writes at VCC levels below
3V are not recommended. A second Vcc comparator,
the ADC UVLO comparator, prevents the ADC from
converting until there is sufficient headroom (Vcc =
2.8V typical).
Power-Up Defaults:
Interrupt latch is cleared.
ADC begins auto /converting at a 0.25Hz rate.
Command byte is set to 00h to facilitate quick re-
mote Receive Byte queries.
THIGH and TLOW registers are set to max and
min limits, respectively
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