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參數(shù)資料
| 型號(hào)： | G574SA |
| 廠商： | Global Mixed-mode Technology Inc. |
| 英文描述： | Dual-Slot PCMCIA/CardBus Power Controller |
| 中文描述： | 雙插槽的PCMCIA / CardBus電源控制器 |
| 文件頁(yè)數(shù)： | 5/16頁(yè) |
| 文件大小： | 367K |
| 代理商： | G574SA |
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Ver: 1.2
Jul 28, 2006
TEL: 886-3-5788833
http://www.gmt.com.tw
13
G574
Global Mixed-mode Technology Inc.
During power up, the G574 controls the rise time of
the VCC and VPP outputs and limits the current into a
faulty card or connector. If a short circuit is applied
after power is established (e.g., hot insertion of a bad
card), current is initially limited only by the impedance
between the short and the power supply. In extreme
cases, as much as 10A to 15A may flow into the short
before the current limiting of the G574 engages. If the
VCC or VPP outputs are driven below ground, the G574
may latch nondestructively in an off state. Cycling
power will reestablish normal operation.
Overcurrent limiting for the VCC outputs is designed to
activate, if powered up, into a short in the range of
0.8A to 2.2A. The VPP outputs limit from 120mA to
450mA. The protection circuitry acts by linearly limiting
the current passing through the switch rather than ini-
tiating a full shutdown of the supply. Shutdown occurs
only during thermal limiting.
Thermal limiting prevents destruction of the IC from
overheating if the package power-dissipation ratings are
exceeded. Thermal limiting disables all power outputs
(both A and B slots) until the device has cooled.
Logic Input and Outputs
The serial interface consists of DATA, CLOCK, and
LATCH leads. The data is clocked in on the positive
leading edge of the clock (see Figure 2 and 3 ). The bit
(D0 through D10 serial data word is loaded during the
positive edge of the latch signal. The latch signal
should occur before the next positive leading edge of
the block.
The shutdown bit of the data word places all VCC and
VPP outputs in a high-impedance state and reduces
chip quiescent current to 2A to conserve battery
power.
The G574 serial interface is designed to be compatible
with serial-interface PCMCIA controllers and current
PCMCIA and Japan Electronic Industry Development
Association (JEIDA) standards.
An overcurrent output ( OC ) is provided to indicate an
overcurrent condition in any of the VCC or VPP outputs
as previously discussed.
Functional Block Diagram
T herm al
Internal
Current M onitor
RES ET
DATA
OC
GND
5V
12V
G574
CLO C K
LATCH
STBY
MO DE
CS
Both 12V pins m ust be connected together.
15
16
17
1
2
30
3.3V
S1
S2
S3
5V
12V
7
24
29
19
3
4
5
6
14
18
S7
S8
S9
S10
9
10
11
8
20
21
22
23
12
S11
S12
S13
S14
S4
S5
S6
AVCC
A VPP
BV CC
BVCC
BV PP
T herm al
Internal
Current M onitor
RES ET
DATA
OC
GND
5V
12V
G574
CLO C K
LATCH
STBY
MO DE
CS
Both 12V pins m ust be connected together.
15
16
17
1
2
30
3.3V
S1
S2
S3
5V
12V
7
24
29
19
3
4
5
6
14
18
S7
S8
S9
S10
9
10
11
8
20
21
22
23
12
S11
S12
S13
S14
S4
S5
S6
AVCC
A VPP
BV CC
BVCC
BV PP
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