
MOTOROLA
Chapter 6. Memory Management
6-31
Page Table Search Operation
Figure 6-10. Secondary Page Table Search Flow—Conceptual Flow
Figure 6-9 shows the case of a
dcbz
instruction that is executed with W = 1 or I = 1, and
that the R bit may be updated in memory (if required) before the operation is performed or
the alignment exception occurs. The R bit may also be updated by a memory protection
violation.
6.5.2
Implementation-Specific Table Search Operation
The G2 core has a set of implementation-specific registers, exceptions, and instructions that
facilitate very efficient software searching of the page tables in memory. This section
describes those resources and provides three example code sequences that can be used in a
G2 core system for an efficient search of the translation tables in software. These three code
sequences can be used as handlers for the three exceptions requiring access to the PTEs in
the page tables in memory—instruction TLB miss, data TLB miss on load, and data TLB
miss on store exceptions.
Generate PA using Secondary Hash Function
PA
←
Base PA of PTEG
Fetch PTE from PTEG
Fetch PTE (64 Bits)
from PA
PA
←
PA + 8
(Fetch Next PTE in PTEG)
PTE [VSID, API, H, V] =
Segment Descriptor [VSID], EA[API], 1, 1
Secondary Page
Table Search Hit
Page Fault
DSI Exception
ISI Exception
Set SRR1[1] = 1
Set DSISR[1 = 1]
(See Figure 6-9)
Secondary Page
Table Search
Otherwise
Otherwise
Last PTE in PTEG
Data Access
Instruction Access
F
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.