參數(shù)資料
型號： FXP1500-48G
廠商： POWER-ONE INC
元件分類： 電源模塊
英文描述： 2-OUTPUT 1669.2 W AC-DC PWR FACTOR CORR MODULE
封裝： ROHS COMPLIANT PACKAGE-26
文件頁數(shù)： 12/15頁
文件大小： 679K
代理商： FXP1500-48G
MCD10075 Rev. 1.2, 16-Mar-10
Page 6 of 15
www.power-one.com
FXP1500/1800 Front-Ends
& FXR-3 Power Shelves Data Sheet
Output Connector Pinning and Signal Specification (48V Models)
Output Connector
Description
Pin
Location
Type
Low level
High level
V max
I max
Overtemperature /
Fan Fail
U1
OC-output, protected by 16 V Zener diode and a 10
resistor in series, referenced to logic GND
<0.4 V @ 20 mA
Pull up
15 V
20 mA
AC Fail /
Power down warning
U2
OC-output, protected by 16 V Zener diode and a 10
resistor in series, referenced to logic GND
<0.4 V @ 20 mA
Pull up
15 V
20 mA
Power Supply Present
U3
Resistor (1 k) connected to logic GND
Open
Pull up
10 V
10 mA
DC Fail /
Output voltage fault
U4
OC-output, protected by 16 V Zener diode and a 10
resistor in series, referenced to logic GND
<0.4 V @ 20 mA
Pull up
15 V
20 mA
Internal ground
U5
Internal ground (Vo1– line before the output filter).
Do not connect the internal grounds in
systems with several units.
ADDR0, I
2C address bus
T1
DIP switch or wire to internal ground,
Internally pull up to 5V (10 k).
Switch closed
Switch open
5V
ADDR1, I
2C address bus
T2
DIP switch or wire to internal ground,
Internally pull up to 5V (10 k).
Switch closed
Switch open
5V
ADDR2, I
2C address bus
T3
DIP switch or wire to internal ground,
Internally pull up to 5V (10 k).
Switch closed
Switch open
5V
ADDR3, I
2C address bus
T4
DIP switch or wire to internal ground,
Internally pull up to 5V (10 k).
Switch closed
Switch open
5V
ADDR4, I
2C address bus
T5
DIP switch or wire to internal ground,
Internally pull up to 5V (10 k).
Switch closed
Switch open
5V
DATA, I
2C data line
S1
I
2C compatible signal
referenced to logic GND
5 V or 3.3 V logic
CLOCK, I
2C clock line
S2
I
2C compatible signal
referenced to logic GND
5 V or 3.3 V logic
Auxiliary power +12 V
S3
Vo2+ output, insulated from main output
Auxiliary power ground
S4
Vo2 - output, insulated from main output
Logic ground
S5
Internally connected over 10 to Auxiliary GND.
Wire separately form Auxiliary - and main output GND
to minimize noise on signals and I
2C. Leave open if not
used.
Output inhibit
R1
PS active when pulled low
(DC-DC stage off when left open)
Referenced to logic GND
<0.8 V
>2.0 V
10 V
3.5 mA
V sense +
R2
Open or connected to Vo1+ at the load
(Internally connected to Vo1+ over 100 )
dV < 3 Vpp
30 mA
V sense -
R3
Open or connected to Vo1- at the load
(Internally connected to Vo1- over 100 )
dV < 3 Vpp
30 mA
Output margin
R4
Open or connected to internal ground
(+8 % Vo1) or V sense+ (-8 % Vo1)
Do not connect the margin pins in
systems with several units.
60V
Synch. Startup
R5
Open or connected to synch startup circuit,
referenced to Vo1 - at the output connector
12V
2mA
Vo1 -
P1, P3, P5
Main output – pins
Vo1 +
P2, P4, P6
Main output + pins
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
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FXP240.07.0100A 功能描述:天線 ISM 433MHZ FLX PCB 100MM 1.13 U.FL RoHS:否 制造商:Molex 技術(shù)類型:Cellular Antenna 頻率: 帶寬: 尺寸:106.7 mm L x 13 mm W
FXP245.07.0100A 功能描述:天線 ISM 450MHZ FLX PCB 100MM 1.13 U.FL RoHS:否 制造商:Molex 技術(shù)類型:Cellular Antenna 頻率: 帶寬: 尺寸:106.7 mm L x 13 mm W
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