參數(shù)資料
型號: FX019P
廠商: CML MICROSYSTEMS PLC
元件分類: 音頻/視頻放大
英文描述: SPECIALTY TELECOM CIRCUIT, PDIP16
封裝: PLASTIC, DIP-16
文件頁數(shù): 2/7頁
文件大?。?/td> 102K
代理商: FX019P
2
Pin Number
Function
FX019DW
FX019P
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
Analogue Inputs :
These individual amplifier inputs are self-biasing, a.c. input
analogue signals must be capacitively coupled to these pins, as
shown in Figure 2.
Note that amplifiers Ch1 to Ch4 are 'inverting amplifiers.'
Controlled Analogue Outputs :
The individual "Gain Controlled" amplifier outputs.
Ch1 to Ch3 range from -3dB to +3dB in 0.43dB steps, Ch4 could be
utilized as a volume control, ranging from -14dB to +14dB in 2.0dB
steps.
In the “OFF” mode there is no output from the selected amplifier.
Serial Clock : This external clock pulse input is used to “clock in” the Control Data. See Figure 4,
Serial Control Data Load Timing. This input has an internal 1M
pullup resistor.
Load/Latch : Governs the loading and execution of the control data. During serial data loading
this input should be kept at a logical '0' to ensure that data rippling past the latches has no effect.
When all 8 bits have been loaded, this input should be strobed '0' - '1' - '0' to latch the new data in.
Data is executed on the falling edge of the strobe. If the Load/Latch input is used this pin should
be left open circuit. This input has an internal 1M
pullup resistor.
Load/Latch : The inverted Load/Latch input. This function governs the loading and execution of
the control data. During serial data loading this input should be kept at a logical '1' to ensure that
data rippling past the latches has no effect. When all 8 bits have been loaded, this input should be
strobed '1' - '0' - '1' to latch the new data in. Data is executed on the rising edge of the strobe.
If the Load/Latch input is used this pin should be left open circuit. This input has an internal 1M
pulldown resistor.
Ch1 Input :
Ch2 Input :
Ch3 Input :
Ch4 Input :
V
SS :
Negative supply rail (GND).
V
BIAS :
The output of the on-chip bias circuitry, held at V
DD/2.
This pin should be decoupled to V
SS
as shown in Figure 2.
Ch4 Output :
Ch3 Output :
Ch2 Output :
Ch1 Output :
Chip Select : A logic input to select one of two FX019 microcircuits in a system, see Table 1.
This input has an internal 1M
pulldown resistor.
Control Data Input : Operation of the 4 amplifier channels (Ch1 – Ch4) is controlled by the 8 bits
of data entered serially at this pin. The data is entered (bit 7 to bit 0) on the rising edge of the
external Serial Clock. The data format is described in Tables 1, 2 and Figure 4. This input has an
internal 1M
pullup resistor.
V
DD :
Positive supply rail. A single +5-volt power supply is required.
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