參數(shù)資料
型號: FX019DW
英文描述: Digitally Controlled Gain Amplifier
中文描述: 數(shù)控增益放大器
文件頁數(shù): 1/6頁
文件大?。?/td> 58K
代理商: FX019DW
1
Features
4 Digitally Controlled Amplifiers
15 Gain/Attenuation Steps
3 Amplifiers, with a ± 3dB Range
in 0.43dB Steps
1 'Volume' Amplifier, with a
± 14dB Range in 2dB Steps
FX019
Brief Description
The FX019 Digitally Adjustable Amplifier Array is
available to replace trimmer potentiometers and
volume controls in Cellular, PMR, Telephony and
Communications applications where d.c., voice or
data signals need adjustment.
The FX019 is a single-chip LSI consisting of four
digitally controlled amplifier stages, each with 15
distinct gain/attenuation steps. Control of each
individual amplifier is by an 8-bit serial data stream.
Three of the amplifier stages offer a +/-3dB range in
steps of 0.43dB, whilst the remaining amplifier offers a
+/-14dB range in steps of 2dB, and is suggested for
volume control applications. Each amplifier includes a
16th 'Off' state which when applied, mutes the output
audio from that channel. This array uses a Chip
Select input to select one of two FX019s in a system.
This product replaces the need for manual trimming
of audible signals by using the host microprocessor to
digitally control the set-up of all audio levels during
development, production/calibration and operation.
Applications include:
(i) Control, adjustment and set-up of communications
equipment by an Intelligent ATE without manual
intervention – eg. Deviation, Microphone and L/S
Levels, Rx Audio Level etc.
(ii) Automatic Dynamic Compensation of drift caused
by variations in temperature, linearity, etc.
(iii)Fully automated servicing and re-alignment.
The FX019 is a low-power, single 5-volt CMOS
device available in plastic DIL and Small Outline
(S.O.I.C.) SMD package versions.
Publication D/019/4 December 1995
8-Bit Serial Data Control
Output Mute Function
Audio and Data Gain Control
Applications
Telecoms, Radio and Industrial
Applications
CML Semiconductor Products
PRODUCT INFORMATION
FX019
2
3
3
3
4
4
SERIAL DATA
INPUT
LOAD/LATCH
LOAD/LATCH
CHIP SELECT
1
1
2
2
Ch1
Ch2
Ch4
Ch3
V
DD
V
BIAS
SERIAL CLOCK
INPUT
V
SS
8-BIT SERIAL DATA INPUT
AND
LINE DECODERS
CONTROLLED AUDIO OUTPUT LINES
VOLUME
Digitally Controlled
Quad Amplifier Array
Fig.1 Functional Block Diagram
相關(guān)PDF資料
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