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參數(shù)資料
| 型號： | FW801A-DB |
| 英文描述： | Low-Power PHY IEEE 1394A-2000 One-Cable Transceiver/Arbiter Device |
| 中文描述： | 低功耗PHY的IEEE 1394A端口，2000年一電纜收發(fā)器/仲裁器裝置 |
| 文件頁數(shù)： | 2/24頁 |
| 文件大?。?/td> | 378K |
| 代理商： | FW801A-DB |
2
Agere Systems Inc.
FW801A Low-Power PHY
IEEE
1394A-2000
One-Cable Transceiver/Arbiter Device
Data Sheet, Rev. 1
June 2001
Table of Contents
Contents
Page
Distinguishing Features ............................................................................................................................................1
Features ...................................................................................................................................................................1
Other Features .........................................................................................................................................................1
Description ................................................................................................................................................................3
Signal Information .....................................................................................................................................................6
Application Information ...........................................................................................................................................10
Crystal Selection Considerations ............................................................................................................................11
1394 Application Support Contact Information .......................................................................................................12
Absolute Maximum Ratings ....................................................................................................................................12
Electrical Characteristics ........................................................................................................................................13
Timing Characteristics ............................................................................................................................................16
Timing Waveforms ..................................................................................................................................................17
Internal Register Configuration ...............................................................................................................................18
Outline Diagrams ....................................................................................................................................................23
Ordering Information ...............................................................................................................................................23
List of Figures
Figures
Page
Figure 1. Block Diagram ...........................................................................................................................................5
Figure 2. Pin Assignments ........................................................................................................................................6
Figure 3. Typical External Component Connections ..............................................................................................10
Figure 4. Typical Port Termination Network ...........................................................................................................11
Figure 5. Dn, CTLn, and LREQ Input Setup and Hold Times Waveforms .............................................................17
Figure 6. Dn, CTLn Output Delay Relative to SYSCLK Waveforms .......................................................................17
List of Tables
Tables
Page
Table 1. Signal Descriptions .....................................................................................................................................7
Table 2. Absolute Maximum Ratings ......................................................................................................................12
Table 3. Analog Characteristics ..............................................................................................................................13
Table 4. Driver Characteristics ...............................................................................................................................14
Table 5. Device Characteristics ..............................................................................................................................15
Table 6. Switching Characteristics .........................................................................................................................16
Table 7. Clock Characteristics ................................................................................................................................16
Table 8. PHY Register Map for the Cable Environment ........................................................................................18
Table 9. PHY Register Fields for the Cable Environment ......................................................................................18
Table 10. PHY Register Page 0: Port Status Page ................................................................................................20
Table 11. PHY Register Port Status Page Fields ...................................................................................................21
Table 12. PHY Register Page 1: Vendor Identification Page .................................................................................22
Table 13. PHY Register Vendor Identification Page Fields ....................................................................................22
相關(guān)PDF資料 |
PDF描述 |
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| FW801 | One-Cable Transceiver/Arbiter Device |
| FW80200M400 | Microprocessor |
| FW80200M600 | Microprocessor |
| FW80200M733 | Microprocessor |
| FW802 | Low-Power PHY IEEE 1394A-2000 Two-Cable Transceiver/Arbiter Device |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| FW801BF | 制造商:AGERE 制造商全稱:AGERE 功能描述:Low-Power PHY 1394a-2000 One-Cable Transceiver/Arbiter Device |
| FW801BF-09-DB | 制造商:AGERE 制造商全稱:AGERE 功能描述:Low-Power PHY 1394a-2000 One-Cable Transceiver/Arbiter Device |
| FW802 | 制造商:AGERE 制造商全稱:AGERE 功能描述:Low-Power PHY IEEE 1394A-2000 Two-Cable Transceiver/Arbiter Device |
| FW80200M400 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Microprocessor |
| FW80200M400SL676 | 功能描述:IC I/O PROCESSOR 400MHZ 241-BGA RoHS:否 類別:集成電路 (IC) >> 嵌入式 - 微處理器 系列:- 標(biāo)準(zhǔn)包裝:2 系列:MPC8xx 處理器類型:32-位 MPC8xx PowerQUICC 特點(diǎn):- 速度:133MHz 電壓:3.3V 安裝類型:表面貼裝 封裝/外殼:357-BBGA 供應(yīng)商設(shè)備封裝:357-PBGA（25x25） 包裝:托盤 |
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