參數(shù)資料
型號: FVXO-LC73BR-FREQ
廠商: FOX ELECTRONICS
元件分類: VCXO, clock
英文描述: VCXO, CLOCK, 0.75 MHz - 1350 MHz, LVDS OUTPUT
封裝: ROHS COMPLIANT, CERAMIC PACKAGE-6
文件頁數(shù): 12/15頁
文件大?。?/td> 333K
代理商: FVXO-LC73BR-FREQ
FVXO-LC73 Series
Page 6 of 15
2008 FOX ELECTRONICS | ISO9001:2000 Certified
NOTE: XPRESSO LVDS VCXOs are designed to
fit on Industry Standard, 6 pad layouts
Pin Description and Recommended Circuit
Pin #
Name
Type
Function
1
VC
Control
Frequency Control by changing voltage
2
E / D
1
Logic
Enable / Disable Control of Output (0 = Disabled)
3
GND
Ground
Electrical Ground for VDD
4
Output
LVDS Oscillator Output
5
Output 2
Output
Complimentary LVDS Output
6
VDD
2
Power
Power Supply Source Voltage
NOTES:
1 Includes pull-up resistor to V
DD to provide output when the pin (2)is No Connect.
2 Installation should include a 0.01F bypass capacitor placed between V
DD
(Pin 6)and GND (Pin 3) to minimize power supply line noise.
VC
VDD
E / D
Output 2
GND
Output
Terminations as viewed from the Top
Enable / Disable Control
Pin # 2 (state)
Output (Pin # 4, Pin # 5)
OPEN (No Connection)
ACTIVE Output
“1” Level VIH > 70% VDD
ACTIVE Output
“0” Level VIL < 30% VDD
High Impedance
3
1
4
6
Soldering Reflow Profile (2 times Maximum at 260°C for 10 seconds MAX)
25°C
160°C
180°C
225°C
260°C
10 Seconds Max
within 5°C of 260°C peak
Ramp Down
Not to exceed 6°C/s
Ramp-Up
3°C/s Max
p
t
120 ± 20 Seconds
In Pre-heating Area
Above 225°C Reflow Area
50±10 Seconds
400 Seconds MAX from +25°C to 260°C peak
2
5
GND
# 3
C
E / D
V
# 1
# 2
OUT
100
# 4
V
0.01 F
# 6
# 5
DD
OUT#2
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